| A formal approach to confidentiality verification in SoCs at the register transfer level J Müller, MR Fadiheh, ALD Antón, T Eisenbarth, D Stoffel, W Kunz 2021 58th ACM/IEEE Design Automation Conference (DAC), 991-996, 2021 | 16 | 2021 |
| Fault attacks on access control in processors: Threat, formal analysis and microarchitectural mitigation ALD Antón, J Müller, MR Fadiheh, D Stoffel, W Kunz IEEE Access 11, 52695-52711, 2023 | 8 | 2023 |
| Design of Access Control Mechanisms in {Systems-on-Chip} with Formal Integrity Guarantees D Mehmedagić, MR Fadiheh, J Müller, ALD Antón, D Stoffel, W Kunz 32nd USENIX Security Symposium (USENIX Security 23), 2779-2796, 2023 | 7 | 2023 |
| VeriCHERI: Exhaustive Formal Security Verification of CHERI at the RTL ALD Antón, J Müller, P Schmitz, T Jauch, A Wezel, L Deutschmann, ... arXiv preprint arXiv:2407.18679, 2024 | | 2024 |
| Data-Oblivious and Performant: On Designing Security-Conscious Hardware L Deutschmann, Y Kazhalawi, J Seckinger, ALD Antón, J Müller, ... 2024 IEEE 25th Latin American Test Symposium (LATS), 1-6, 2024 | | 2024 |
| A Golden-Free Formal Method for Trojan Detection in Non-Interfering Accelerators ALD Antón, J Müller, L Deutschmann, MR Fadiheh, D Stoffel, W Kunz 2024 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2024 | | 2024 |
| A Golden-Free Formal Method for Trojan Detection in Non-Interfering Accelerators A Lena Duque Antón, J Müller, L Deutschmann, M Rahmani Fadiheh, ... arXiv e-prints, arXiv: 2312.06515, 2023 | | 2023 |
| A New Security Threat in MCUs--SoC-wide timing side channels and how to find them J Müller, ALD Antón, L Deutschmann, D Mehmedagić, MR Fadiheh, ... arXiv preprint arXiv:2309.12925, 2023 | | 2023 |
Johannes MüllerUniversity of Kaiserslautern (RPTU)在 rptu.de 的电子邮件经过验证
