| K-Means cluster-based interference alignment with Adam optimizer in convolutional neural networks T Kanaparthi, S Ramesh, RS Yarrabothu International Journal of Information Security and Privacy (IJISP) 16 (2), 1-18, 2022 | 10 | 2022 |
| Pilotcontamination analysis of Massive MIMO 5G networks based on HetNets weighted scheduling with reinforcement markov encoder model T Kanaparthi, RS Yarrabothu 2023 International Conference on Artificial Intelligence and Knowledge …, 2023 | 1 | 2023 |
| Enhanced channel estimation in Multiple-Input Multiple-Output systems: A Dual Quadratic Decomposition Algorithm approach for Interference Cancellation S Ramanathan, T Kanaparthi, RS Yarrabothu, R Sundar Inf. Dyn. Appl 2 (3), 135-142, 2023 | 1 | 2023 |
| Interference Alignment in Channel Estimation Using Hybrid Deep Neural Network with Multi-user Propagation Model for 5G in MM Wave Massive MIMO T Kanaparthi, RS Yarrabothu, S Ramesh IETE Journal of Research 70 (5), 4469-4481, 2024 | | 2024 |
| Enhancing 5G Massive MIMO Systems Using a Compressive Sensing-Based Approach. T Kanaparthi, RS Yarrabothu, R Sundar Traitement du Signal 40 (4), 2023 | | 2023 |
| Channel estimation of mmWave Massive MIMO System using multi cell-based Pilot allocation protocol integrated with deep neural network T Kanaparthi, RS Yarrabothu 2023 IEEE Wireless Antenna and Microwave Symposium (WAMS), 1-6, 2023 | | 2023 |
| Review On Channel Estimation In 5g Massive Mimo Using Tdm and Ai T KANAPARTHI, R SUNDAR International Journal of communication and computer Technologies 9 (1), 15-22, 2021 | | 2021 |
| Low Delay and area Efficient mitchells algorithm based multiplier MP K.Tirupataiah International Journal of Management,Technology And Engineering(IJMTE), 2019 | | 2019 |
| An Advanced Encryption Standard using reconfigurable Reversible Logic Gates PA K.Tirupataiah, R.Bapanna Dora International Journal For Innovative Research 3 (3), 2017 | | 2017 |
| Implementation of Fully Reused VLSI Architecture of FM0/ Manchester Encoding using SOLS Technique for Efficient DSRC Applications PA K.Tirupataiah, R.Bapanna Dora IJIIRESTS, 2017 | | 2017 |
| The Design of FPGA Implementation of 16-Tap Fir Filter Using DA Algorithm KRS K.Tirupataiah ijcta 3 (5), 2012 | | 2012 |
