A statistical traffic model for on-chip interconnection networks V Soteriou, H Wang, L Peh 14th IEEE International Symposium on Modeling, Analysis, and Simulation, 104-116, 2006 | 219 | 2006 |
Design-space exploration of power-aware on/off interconnection networks V Soteriou, LS Peh IEEE International Conference on Computer Design: VLSI in Computers and …, 2004 | 150 | 2004 |
Exploring the design space of self-regulating power-aware on/off interconnection networks V Soteriou, LS Peh IEEE Transactions on Parallel and Distributed Systems 18 (3), 393-408, 2007 | 121 | 2007 |
Dynamic power management for power optimization of interconnection networks using on/off links V Soteriou, LS Peh 11th Symposium on High Performance Interconnects, 2003. Proceedings., 15-20, 2003 | 110 | 2003 |
Design of a high-throughput distributed shared-buffer NoC router RS Ramanujam, V Soteriou, B Lin, LS Peh 2010 Fourth ACM/IEEE International Symposium on Networks-on-Chip, 69-78, 2010 | 105 | 2010 |
Up by their bootstraps: Online learning in artificial neural networks for CMP uncore power management JY Won, X Chen, P Gratz, J Hu, V Soteriou 2014 IEEE 20th International Symposium on High Performance Computer …, 2014 | 76 | 2014 |
A high-throughput distributed shared-buffer NoC router V Soteriou, RS Ramanujam, B Lin, LS Peh IEEE Computer Architecture Letters 8 (1), 21-24, 2009 | 76 | 2009 |
Software-directed power-aware interconnection networks V Soteriou, N Eisley, LS Peh ACM Transactions on Architecture and Code Optimization (TACO) 4 (1), 5-es, 2007 | 75 | 2007 |
Software-directed power-aware interconnection networks V Soteriou, N Eisley, LS Peh Proceedings of the 2005 ACM International Conference on Compilers …, 2005 | 75 | 2005 |
Intelligent hotspot prediction for network-on-chip-based multicore systems E Kakoulli, V Soteriou, T Theocharides IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2012 | 64 | 2012 |
Polaris: A system-level roadmap for on-chip interconnection networks V Soteriou, N Eisley, H Wang, B Li, LS Peh 2006 International Conference on Computer Design, 134-141, 2006 | 60 | 2006 |
Use it or lose it: Wear-out and lifetime in future chip multiprocessors H Kim, A Vitkovskiy, PV Gratz, V Soteriou Proceedings of the 46th Annual IEEE/ACM International Symposium on …, 2013 | 56 | 2013 |
High-level power analysis for multi-core chips N Eisley, V Soteriou, LS Peh Proceedings of the 2006 international conference on Compilers, architecture …, 2006 | 47 | 2006 |
A dynamically adjusting gracefully degrading link-level fault-tolerant mechanism for NoCs A Vitkovskiy, V Soteriou, C Nicopoulos IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2012 | 34 | 2012 |
Extending the effective throughput of nocs with distributed shared-buffer routers RS Ramanujam, V Soteriou, B Lin, LS Peh IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2011 | 34 | 2011 |
2.5 D root of trust: Secure system-level integration of untrusted chiplets M Nabeel, M Ashraf, S Patnaik, V Soteriou, O Sinanoglu, J Knechtel IEEE Transactions on Computers 69 (11), 1611-1625, 2020 | 32 | 2020 |
Virtualizing virtual channels for increased network-on-chip robustness and upgradeability M Evripidou, C Nicopoulos, V Soteriou, J Kim 2012 IEEE Computer Society Annual Symposium on VLSI, 21-26, 2012 | 31 | 2012 |
Polaris: A system-level roadmapping toolchain for on-chip interconnection networks V Soteriou, N Eisley, H Wang, B Li, LS Peh IEEE transactions on very large scale integration (VLSI) systems 15 (8), 855-868, 2007 | 29 | 2007 |
Hermes: Architecting a top-performing fault-tolerant routing algorithm for Networks-on-Chips C Iordanou, V Soteriou, K Aisopos 2014 IEEE 32nd International Conference on Computer Design (ICCD), 424-431, 2014 | 26 | 2014 |
A holistic approach towards intelligent hotspot prevention in network-on-chip-based multicores V Soteriou, T Theocharides, E Kakoulli IEEE transactions on computers 65 (3), 819-833, 2015 | 22 | 2015 |