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Jialing Tong
Jialing Tong
3D Systems Packaging Research Center, Georgia Institute of Technology
在 gatech.edu 的电子邮件经过验证
标题
引用次数
引用次数
年份
Electrical modeling and analysis of tapered through-package via in glass interposers
J Tong, Y Sato, K Panayappan, V Sundaram, AF Peterson, RR Tummala
IEEE Transactions on Components, Packaging and Manufacturing Technology 6 (5 …, 2016
292016
First demonstration of reliable copper-plated 30μm diameter through-package-vias in ultra-thin bare glass interposers
K Demir, A Armutlulu, J Tong, R Pucha, V Sundaram, R Tummala
2014 IEEE 64th Electronic Components and Technology Conference (ECTC), 1098-1102, 2014
252014
Substrate-integrated waveguides in glass interposers with through-package-vias
J Tong, V Sundaram, A Shorey, R Tummala
2015 IEEE 65th Electronic Components and Technology Conference (ECTC), 2222-2227, 2015
232015
Design and demonstration of 2.5 D glass interposers as a superior alternative to silicon interposers for 28 Gbps signal transmission
B Sawyer, BC Chou, J Tong, W Vis, K Panayappan, S Deng, H Tournier, ...
2016 IEEE 66th Electronic Components and Technology Conference (ECTC), 972-977, 2016
222016
Characterization of electrical properties of glass and transmission lines on thin glass up to 50 GHz
WT Khan, J Tong, S Sitaraman, V Sundaram, R Tummala, ...
2015 IEEE 65th Electronic Components and Technology Conference (ECTC), 2138-2143, 2015
202015
Electrical comparison between TSV in silicon and TPV in glass for interposer and package applications
J Tong, K Panayappan, V Sundaram, R Tummala
2016 IEEE 66th Electronic Components and Technology Conference (ECTC), 2581-2587, 2016
132016
High-frequency characterization of through package vias formed by focused electrical-discharge in thin glass interposers
J Tong, Y Sato, S Takahashi, N Imajyo, AF Peterson, V Sundaram, ...
2014 IEEE 64th Electronic Components and Technology Conference (ECTC), 2271-2276, 2014
132014
Via-first process to enable copper metallization of glass interposers with high-aspect-ratio, fine-pitch through-package-vias
TB Huang, B Chou, J Tong, T Ogawa, V Sundaram, RR Tummala
IEEE Transactions on Components, Packaging and Manufacturing Technology 7 (4 …, 2017
52017
Thermal runaway prediction based on electrothermal models in nanotechnologies
J Tong, X Li, J Mao
2011 IEEE Electrical Design of Advanced Packaging and Systems Symposium …, 2011
52011
Temperature-dependent device behavior in advanced CMOS technologies
X Li, J Tong, J Mao
2010 International Symposium on Signals, Systems and Electronics 2, 1-4, 2010
32010
Electrical modeling design and characterization of tapered through-package-vias in glass interposers for high-performance applications
J Tong
Georgia Institute of Technology, 2016
22016
Modeling and analysis of electrothermal effects on global ULSI interconnects
X Li, J Tong, Y Shao, J Mao
2010 IEEE Electrical Design of Advanced Package & Systems Symposium, 1-4, 2010
22010
Gradient index metamaterials based on dielectric disks
D Bao, W Qin, J Tong, XM Yang, Q Cheng, TJ Cui
2008 International Workshop on Metamaterials, 394-396, 2008
22008
High Reliability and High Performance 30μm Through-Package-Vias in Ultra-Thin Bare Glass Interposer
V Sundaram, J Tong, K Demir, T Huang, A Shorey, S Pollard, R Tummala
International Symposium on Microelectronics 2014 (1), 000402-000408, 2014
12014
Large Silicon, Glass or Low-CTE Organic Package to Printed Wiring Board SMT Interconnections
VSRT P. M. Raj, Xian Qin, Jialing Tong, Gary Menezes
http://www.chipscalereview.com/legacy/tech_monthly/csrtm-0713-smt …, 2013
2013
The network analysis of chiral cascaded circuit and its novel application on directional coupler
XM Yang, J Tong, W Qin, TJ Cui
2008 International Workshop on Metamaterials, 400-404, 2008
2008
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