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Yue Lu
Yue Lu
在 berkeley.edu 的电子邮件经过验证
标题
引用次数
引用次数
年份
BAG: A designer-oriented integrated framework for the development of AMS circuit generators
J Crossley, A Puggelli, HP Le, B Yang, R Nancollas, K Jung, L Kong, ...
2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 74-81, 2013
942013
Design and analysis of energy-efficient reconfigurable pre-emphasis voltage-mode transmitters
Y Lu, K Jung, Y Hidaka, E Alon
IEEE Journal of Solid-State Circuits 48 (8), 1898-1909, 2013
662013
Design techniques for a 66 Gb/s 46 mW 3-tap decision feedback equalizer in 65 nm CMOS
Y Lu, E Alon
IEEE Journal of Solid-State Circuits 48 (12), 3243-3257, 2013
512013
Design techniques for a 60-Gb/s 288-mW NRZ transceiver with adaptive equalization and baud-rate clock and data recovery in 65-nm CMOS technology
J Han, N Sutardja, Y Lu, E Alon
IEEE Journal of Solid-State Circuits 52 (12), 3474-3485, 2017
442017
Design Techniques for a 60 Gb/s 173 mW Wireline Receiver Frontend in 65 nm CMOS Technology
J Han, Y Lu, N Sutardja, K Jung, E Alon
IEEE Journal of Solid-State Circuits 51 (4), 871 - 880, 2016
392016
A 5 Gb/s link with matched source synchronous and common-mode clocking techniques
J Zerbe, B Daly, L Luo, W Stonecypher, W Dettloff, JC Eble, T Stone, ...
IEEE Journal of Solid-State Circuits 46 (4), 974-985, 2011
342011
6.2 A 60Gb/s 288mW NRZ transceiver with adaptive equalization and baud-rate clock and data recovery in 65nm CMOS technology
J Han, Y Lu, N Sutardja, E Alon
2017 IEEE International Solid-State Circuits Conference (ISSCC), 112-113, 2017
292017
A 66Gb/s 46mW 3-tap decision-feedback equalizer in 65nm CMOS
Y Lu, E Alon
2013 IEEE International Solid-State Circuits Conference Digest of Technical …, 2013
242013
Power analysis and optimization for high-speed I/O transceivers
K Jung, Y Lu, E Alon
2011 IEEE 54th international Midwest symposium on circuits and systems …, 2011
242011
A multi-GHz area-efficient comparator with dynamic offset cancellation
L Kong, Y Lu, E Alon
2011 IEEE Custom Integrated Circuits Conference (CICC), 1-4, 2011
222011
Wide-range clock multiplier
Y Lu, JL Zerbe
US Patent 8,643,409, 2014
212014
A 60Gb/s 173mW receiver frontend in 65nm CMOS technology
J Han, Y Lu, N Sutardja, K Jung, E Alon
2015 Symposium on VLSI Circuits (VLSI Circuits), C230-C231, 2015
192015
Light detection system having multiple lens-receiver units
Y Wang, C Wang, Y Lu, L Kong
US Patent 10,670,719, 2020
182020
Multi-pulse fusion analysis for LiDAR ranging
Z Zhu, Y Lu, J Li, JK Wu
US Patent 10,473,770, 2019
112019
A 10Gb/s 10mW 2-tap reconfigurable pre-emphasis transmitter in 65nm LP CMOS
Y Lu, K Jung, Y Hidaka, E Alon
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 1-4, 2012
92012
Constant false alarm rate detection in pulsed LiDAR systems
Z Zhu, Y Lu, JK Wu, L Kong
US Patent 11,041,944, 2021
82021
System and methods for ranging operations using multiple signals
V Chawla, Y Lu, Y Yu
US Patent 11,506,764, 2022
72022
Optical sensing in MEMS package for LiDAR system
Y Wang, Y Lu, C Zuow-Zun
US Patent 11,614,518, 2023
32023
Hybrid detectors for various detection range in lidar
Y Wang, Y Guo, A Pan, Y Lu, L Kong
US Patent App. 16/869,403, 2021
32021
Feed-forward phase noise/spur cancellation
Y Lu, C Zuow-Zun, J Yang
US Patent App. 15/863,779, 2019
32019
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