| An ultra high speed architecture for VLSI implementation of hash functions N Sklavos, G Dimitroulakos, O Koufopavlou 10th IEEE International Conference on Electronics, Circuits and Systems …, 2003 | 48 | 2003 |
| Accelerating applications by mapping critical kernels on coarse-grain reconfigurable hardware in hybrid systems MD Galanis, G Dimitroulakos, CE Goutis 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines …, 2005 | 41 | 2005 |
| Resource aware mapping on coarse grained reconfigurable arrays G Dimitroulakos, S Georgiopoulos, MD Galanis, CE Goutis Microprocessors and Microsystems 33 (2), 91-105, 2009 | 32 | 2009 |
| Compiling Scilab to high performance embedded multicore systems T Stripf, O Oey, T Bruckschloegl, J Becker, G Rauwerda, K Sunesen, ... Microprocessors and Microsystems 37 (8), 1033-1049, 2013 | 25 | 2013 |
| Alleviating the data memory bandwidth bottleneck in coarse-grained reconfigurable arrays G Dimitroulakos, MD Galanis, CE Goutis 2005 IEEE International Conference on Application-Specific Systems …, 2005 | 20 | 2005 |
| Exploring the design space of an optimized compiler approach for mesh-like coarse-grained reconfigurable architectures G Dimitroulakos, MD Galanis, CE Goutis Proceedings 20th IEEE International Parallel & Distributed Processing …, 2006 | 19 | 2006 |
| An efficient VLSI implementation for forward and inverse wavelet transform for JPEG2000 G Dimitroulakos, ND Zervas, N Sklavos, CE Goutis 2002 14th International Conference on Digital Signal Processing Proceedings …, 2002 | 14 | 2002 |
| Partitioning methodology for heterogeneous reconfigurable functional units MD Galanis, G Dimitroulakos, CE Goutis The Journal of Supercomputing 38, 17-34, 2006 | 13 | 2006 |
| A high-throughput, memory efficient architecture for computing the tile-based 2D discrete wavelet transform for the JPEG2000 G Dimitroulakos, MD Galanis, A Milidonis, CE Goutis Integration 39 (1), 1-11, 2005 | 13 | 2005 |
| Design space exploration of an optimized compiler approach for a generic reconfigurable array architecture G Dimitroulakos, MD Galanis, CE Goutis The Journal of Supercomputing 40, 127-157, 2007 | 11 | 2007 |
| Performance improvements from partitioning applications to FPGA hardware in embedded SoCs MD Galanis, G Dimitroulakos, CE Goutis The Journal of Supercomputing 35, 185-199, 2006 | 11 | 2006 |
| Speedups from partitioning critical software parts to coarse-grain reconfigurable hardware MD Galanis, G Dimitroulakos, CE Goutis 2005 IEEE International Conference on Application-Specific Systems …, 2005 | 10 | 2005 |
| Dynamic source code analysis for memory hierarchy optimization in multimedia applications C Lezos, G Dimitroulakos, A Freskou, K Masselos 2013 Conference on Design and Architectures for Signal and Image Processing …, 2013 | 8 | 2013 |
| MEMSCOPT: A source-to-source compiler for dynamic code analysis and loop transformations G Dimitroulakos, C Lezos, K Masselos Proceedings of the 2012 Conference on Design and Architectures for Signal …, 2012 | 8 | 2012 |
| Speedups and energy reductions from mapping DSP applications on an embedded reconfigurable system MD Galanis, G Dimitroulakos, CE Goutis IEEE Transactions on Very Large Scale Integration (VLSI) Systems 15 (12 …, 2007 | 8 | 2007 |
| Performance improvements using coarse-grain reconfigurable logic in embedded SOCs G Dimitroulakos, MD Galanis, CE Goutis International Conference on Field Programmable Logic and Applications, 2005 …, 2005 | 8 | 2005 |
| A compiler method for memory-conscious mapping of applications on coarse-grained reconfigurable architectures G Dimitroulakos, MD Galanis, CE Goutis 19th IEEE International Parallel and Distributed Processing Symposium, 4 pp., 2005 | 8 | 2005 |
| Speedups in embedded systems with a high-performance coprocessor datapath MD Galanis, G Dimitroulakos, S Tragoudas, CE Goutis ACM Transactions on Design Automation of Electronic Systems (TODAES) 12 (3 …, 2008 | 7 | 2008 |
| A unified evaluation framework for coarse grained reconfigurable array architectures G Dimitroulakos, MD Galanis, N Kostaras, CE Goutis Proceedings of the 4th international conference on Computing frontiers, 161-172, 2007 | 7 | 2007 |
| Mapping DSP applications on processor/coarse-grain reconfigurable array architectures MD Galanis, G Dimitroulakos, CE Goutis 2006 IEEE International Symposium on Circuits and Systems, 4 pp., 2006 | 7 | 2006 |
