| The gem5 simulator: Version 20.0+ J Lowe-Power, AM Ahmad, A Akram, M Alian, R Amslinger, M Andreozzi, ... arXiv preprint arXiv:2007.03152, 2020 | 275 | 2020 |
| DRAMPower: Open-source DRAM Power & Energy Estimation Tool K Chandrasekar, C Weis, Y Li, S Goossens, M Jung, O Naji, B Akesson, ... http://www.drampower.info, 2014 | 202 | 2014 |
| DRAMSys: A Flexible DRAM Subsystem Design Space Exploration Framework M Jung, C Weis, N Wehn IPSJ Transactions on System LSI Design Methodology 8, 63-74, 2015 | 75 | 2015 |
| Approximate Computing with Partially Unreliable Dynamic Random Access Memory: Approximate DRAM M Jung, DM Mathew, C Weis, N Wehn Design Automation Conference (DAC), 2016 | 57 | 2016 |
| System Simulation with gem5 and SystemC: The Keystone for Full Interoperability C Menard, M Jung, J Castrillon, N Wehn IEEE International Conference on Embedded Computer Systems Architectures …, 2017 | 56 | 2017 |
| Omitting Refresh: A Case Study for Commodity and Wide I/O DRAMs M Jung, É Zulian, DM Mathew, M Herrmann, C Brugger, C Weis, N Wehn International Symposium On Memory Systems (MEMSYS '15), 85-91, 2015 | 54 | 2015 |
| TLM Modelling of 3D Stacked Wide I/O DRAM Subsystems: a Virtual Platform for Memory Controller Design Space Exploration M Jung, C Weis, N Wehn, K Chandrasekar Workshop on Rapid Simulation and Performance Evaluation 2013 (RAPIDO) HiPEAC …, 2013 | 52 | 2013 |
| Reverse Engineering of DRAMs: Row Hammer with Crosshair M Jung, C Rheinländer, C Weis, N Wehn International Symposium on Memory Systems (MEMSYS 2016), 2016 | 42 | 2016 |
| Energy Optimization in 3D MPSoCs with Wide-I/O DRAM Using Temperature Variation Aware Bank-Wise Refresh M Sadri, M Jung, C Weis, N Wehn, L Benini Proceedings of the conference on Design, Automation & Test in Europe, 281, 2014 | 38 | 2014 |
| Retention time measurements and modelling of bit error rates of WIDE I/O DRAM in MPSoCs C Weis, M Jung, P Ehses, C Santos, S Pascal Vivet, Goossens, ... Proceedings of the 2015 Design, Automation & Test in Europe Conference …, 2015 | 37 | 2015 |
| A Platform to Analyze DDR3 DRAM's Power and Retention Time M Jung, DM Mathew, CC Rheinlander, C Weis, N Wehn IEEE Design & Test, 2017 | 33 | 2017 |
| A high-level DRAM timing, power and area exploration tool O Naji, C Weis, M Jung, N Wehn, A Hansson 2015 International conference on embedded computer systems: architectures …, 2015 | 33 | 2015 |
| Efficient Reliability Management in SoCs - An Approximate DRAM Perspective M Jung, DM Mathew, C Weis, N Wehn 21st Asia and South Pacific Design Automation Conference (ASP-DAC), 2016 | 32 | 2016 |
| DRAMSys4. 0: a fast and cycle-accurate systemC/TLM-based DRAM simulator L Steiner, M Jung, FS Prado, K Bykov, N Wehn Embedded Computer Systems: Architectures, Modeling, and Simulation: 20th …, 2020 | 31 | 2020 |
| ConGen: An Application Specific DRAM Memory Controller Generator M Jung, I Heinrich, M Natale, DM Mathew, C Weis, S Krumke, N Wehn International Symposium on Memory Systems (MEMSYS 2016), 2016 | 31 | 2016 |
| Exploring System Performance using Elastic Traces: Fast, Accurate and Portable R Jagtap, S Diestelhorst, A Hansson, M Jung, N Wehn IEEE International Conference on Embedded Computer Systems Architectures …, 2016 | 31 | 2016 |
| Driving Into the Memory Wall: The Role of Memory for Advanced Driver Assistance Systems and Autonomous Driving M Jung, SA McKee, C Sudarshan, C Dropmann, C Weis, N Wehn International Symposium on Memory Systems (MEMSYS), 2018 | 25 | 2018 |
| Optimized Active and Power-Down Mode Refresh Control in 3D-DRAMs M Jung, M Sadri, C Weis, N Wehn, L Benini IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC), 2014 | 24 | 2014 |
| A lean, low power, low latency DRAM memory controller for transprecision computing C Sudarshan, J Lappas, C Weis, DM Mathew, M Jung, N Wehn Embedded Computer Systems: Architectures, Modeling, and Simulation: 19th …, 2019 | 23 | 2019 |
| An Analysis on Retention Error Behavior and Power Consumption of Recent DDR4 DRAMs DM Mathew, M Schultheis, CC Rheinländer, C Sudarshan, M Jung, ... IEEE Conference Design, Automation and Test in Europe (DATE), 2018 | 21 | 2018 |
Norbert WehnUniversity of Kaiserslautern在 eit.uni-kl.de 的电子邮件经过验证
