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karthik nasani
karthik nasani
Ph.D Scholar, NIT Silchar
在 ece.nits.ac.in 的电子邮件经过验证
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Effect of lateral straggle parameter on hetero junction dual gate vertical TFET
K Nasani, B Bhowmick, PD Pukhrambam
Microelectronics Journal 138, 105845, 2023
52023
eagri: Smart agriculture monitoring scheme using machine learning strategies
J Venkatesh, KK Ramasamy, M Aruna, KPK Rao, N Sasikala, K Nasani
2022 International Conference on Innovative Computing, Intelligent …, 2022
52022
Impact of Noise and Interface Trap Charge on a Heterojunction Dual-Gate Vertical TFET Device
K Nasani, B Bhowmick, PD Pukhrambam
Journal of Electronic Materials 53 (4), 2181-2190, 2024
32024
Study of parametric variations on Heterojunction Dual Gate Vertical TFET for performance Enhancement
K Nasani, B Bhowmick, PD Pukhrambam
2023 IEEE Silchar Subsection Conference (SILCON), 1-6, 2023
12023
Image security using self embedding fragile watermarking method
S Enugula, G Shruthi, V Vikram
International Research Journal on Advanced Science Hub 2 (06), 65-71, 2020
12020
Study of Heterojunction Dual Gate Vertical TFET Applications in Gas Sensing
K Nasani, B Bhowmick, PD Pukhrambam
2024 International Conference on Numerical Simulation of Optoelectronic …, 2024
2024
Design and Simulation of Y-shaaped Waveguide Based on Silicon 2D Photonic Crystal for Photonic Integrated Circuits
T Deb, PD Pukhrambam, K Nasani
2024 International Conference on Numerical Simulation of Optoelectronic …, 2024
2024
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