| A seven level cascaded H-bridge inverter topology with reduced sources R Sahoo, PR Kasari, MR Mishra, A Chakraborti, AD Kumar, B Das 2018 2nd International Conference on Inventive Systems and Control (ICISC …, 2018 | 6 | 2018 |
| An FPGA-based balancing of capacitor voltage for multi-level inverter R Sahoo, M Roy Australian Journal of Electrical and Electronics Engineering, 1-13, 2024 | 1 | 2024 |
| Balancing of Capacitor Voltage for 5-level Inverter by Using Modified Reference Wave R Sahoo, M Roy 2021 National Power Electronics Conference (NPEC), 01-06, 2021 | 1 | 2021 |
| An FPGA-Based Balancing of Capacitor Voltage for a Five-Level CHB Inverter R Sahoo, M Roy Arabian Journal for Science and Engineering, 1-12, 2024 | | 2024 |
| Asymmetrical multi‐level inverter by using space vector pulse width modulation technique for low and medium power applications R Sahoo, M Roy International Journal of Circuit Theory and Applications, 2024 | | 2024 |
| Design and Implementation of Transformer less UPS in Addition with Reactive Power Compensation for Industrial Application R Sahoo, S Bhowmik, M Roy 2023 3rd International Conference on Emerging Frontiers in Electrical and …, 2023 | | 2023 |
| Designing of Transformer for DC Flyback Converter S Saha, R Sahoo, M Roy 2023 11th National Power Electronics Conference (NPEC), 1-6, 2023 | | 2023 |
