| An analytical threshold voltage model for triple-material cylindrical gate-all-around (TM-CGAA) MOSFETs S Dubey, A Santra, G Saramekala, M Kumar, PK Tiwari IEEE Transactions on Nanotechnology 12 (5), 766-774, 2013 | 58 | 2013 |
| An analytical threshold voltage model for a short-channel dual-metal-gate (DMG) recessed-source/drain (Re-S/D) SOI MOSFET GK Saramekala, A Santra, S Dubey, S Jit, PK Tiwari Superlattices and Microstructures 60, 580-595, 2013 | 25 | 2013 |
| A rigorous simulation based study of gate misalignment effects in gate engineered double-gate (DG) MOSFETs S Sarangi, S Bhushan, A Santra, S Dubey, S Jit, PK Tiwari Superlattices and Microstructures 60, 263-279, 2013 | 25 | 2013 |
| Analytical subthreshold current and subthreshold swing models of short-channel dual-metal-gate (DMG) fully-depleted recessed-source/drain (Re-S/D) SOI MOSFETs GK Saramekala, A Santra, M Kumar, S Dubey, S Jit, PK Tiwari Journal of Computational Electronics 13, 467-476, 2014 | 15 | 2014 |
| A power efficient output capacitor-less LDO regulator with auto-low power mode and using feed-forward compensation A Santra, QA Khan 2019 32nd International Conference on VLSI Design and 2019 18th …, 2019 | 14 | 2019 |
| An analytical surface potential modeling of fully-depleted symmetrical double-gate (DG) strained-Si MOSFETs including the effect of interface charges S Sarangi, A Santra, S Bhushan, KS Gopi, S Dubey, PK Tiwari 2013 Students Conference on Engineering and Systems (SCES), 1-5, 2013 | 14 | 2013 |
| An analytical surface potential model of strained-si on silicongermanium MOSFET including the effects of interface charge S Bhushan, S Sarangi, A Santra, M Kumar, S Dubey, S Jit, PK Tiwari Journal of Electron Device 15, 1285-1290, 2012 | 7 | 2012 |
| A highly scalable, time-based capless low-dropout regulator using master-slave domino control A Santra, A De Carmine, GVS Rao, QA Khan 2019 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2019 | 6 | 2019 |
| Area and current efficient capacitor-less low drop-out regulator using time-based error amplifier QA Khan, S Saxena, A Santra 2018 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2018 | 6 | 2018 |
| An accurate, power and area efficient 13.33 x charge pump with wide-range programmability for biomedical sensors A Patil, S Bhat, A Santra 2020 33rd International Conference on VLSI Design and 2020 19th …, 2020 | 4 | 2020 |
| A Low Noise, Low Power, Wide Range Programmable Output Reference Buffer for Sensor Applications PR Thota, K Wadagavi, N Rakesh, S Bhat, A Santra 2020 33rd International Conference on VLSI Design and 2020 19th …, 2020 | 3 | 2020 |
| A simulation-based study of gate misalignment effects in triple-material double-gate (tmdg) mosfets S Sarangi, S Bhushan, SG Krishna, A Santra, PK Tiwari 2013 International Mutli-Conference on Automation, Computing, Communication …, 2013 | 3 | 2013 |
| A High Gain, Low Offset Time-Based Operational Amplifier for Capacitive Loads with 36MHz UGB and 70µA Quiescent Current A Santra, QA Khan 2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS …, 2021 | 1 | 2021 |
| A current efficient 10mA analog-assisted digital low dropout regulator with dynamic clock frequency in 65nm CMOS A De Carmine, A Santra, QA Khan 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2020 | 1 | 2020 |
| An analytical study of short-channel effects of strained-si on silicon-germanium-on-insulator (SGOI) MOSFETs including interface charges M Kumar, S Dubey, S Jit, A Santra, PK Tiwari | 1 | 2012 |
| Analytical Modeling of Threshold Voltage of Stacked Triple-Material-Gate (TMG) Strained-Si (s-Si) on Silicon-Germanium-on-Insulator (SGOI) MOSFETs. A Santra, M Kumar, S Dubey, S Jit, PK Tiwari Journal of Active & Passive Electronic Devices 9, 2014 | | 2014 |
| A Subthreshold Analysis of Triple-Material Cylindrical Gate-All-Around (TM-CGAA) MOSFETs SA Anandmoya | | 2013 |
Pramod Kumar TiwariIndian Institute of Technology Patna在 iitp.ac.in 的电子邮件经过验证
