| A review of in-memory computing architectures for machine learning applications S Bavikadi, PR Sutradhar, KN Khasawneh, A Ganguly, ... Proceedings of the 2020 on Great Lakes Symposium on VLSI, 89-94, 2020 | 65 | 2020 |
| A survey on machine learning accelerators and evolutionary hardware platforms S Bavikadi, A Dhavlle, A Ganguly, A Haridass, H Hendy, C Merkel, ... IEEE Design & Test 39 (3), 91-116, 2022 | 41 | 2022 |
| pPIM: A programmable processor-in-memory architecture with precision-scaling for deep learning PR Sutradhar, M Connolly, S Bavikadi, SMP Dinakarrao, MA Indovina, ... IEEE Computer Architecture Letters 19 (2), 118-121, 2020 | 37 | 2020 |
| Look-up-table based processing-in-memory architecture with programmable precision-scaling for deep learning applications PR Sutradhar, S Bavikadi, M Connolly, S Prajapati, MA Indovina, ... IEEE Transactions on Parallel and Distributed Systems 33 (2), 263-275, 2021 | 30 | 2021 |
| Defense against on-chip trojans enabling traffic analysis attacks MM Ahmed, A Dhavlle, N Mansoor, P Sutradhar, SMP Dinakarrao, K Basu, ... 2020 Asian Hardware Oriented Security and Trust Symposium (AsianHOST), 1-6, 2020 | 16 | 2020 |
| upim: Performance-aware online learning capable processing-in-memory S Bavikadi, PR Sutradhar, A Ganguly, SMP Dinakarrao 2021 IEEE 3rd International Conference on Artificial Intelligence Circuits …, 2021 | 9 | 2021 |
| Implementation and evaluation of deep neural networks in commercially available processing in memory hardware P Das, PR Sutradhar, M Indovina, SMP Dinakarrao, A Ganguly 2022 IEEE 35th International System-on-Chip Conference (SOCC), 1-6, 2022 | 8 | 2022 |
| An ultra-efficient look-up table based programmable processing in memory architecture for data encryption PR Sutradhar, K Basu, SMP Dinakarrao, A Ganguly 2021 IEEE 39th International Conference on Computer Design (ICCD), 252-259, 2021 | 7 | 2021 |
| Heterogeneous multi-functional look-up-table-based processing-in-memory architecture for deep learning acceleration S Bavikadi, PR Sutradhar, A Ganguly, SMP Dinakarrao 2023 24th International Symposium on Quality Electronic Design (ISQED), 1-8, 2023 | 5 | 2023 |
| Polar: Performance-aware on-device learning capable programmable processing-in-memory architecture for low-power ml applications S Bavikadi, PR Sutradhar, MA Indovina, A Ganguly, SMP Dinakarrao 2022 25th Euromicro Conference on Digital System Design (DSD), 889-898, 2022 | 5 | 2022 |
| Reconfigurable Processing-in-Memory Architecture for Data Intensive Applications S Bavikadi, PR Sutradhar, A Ganguly, SMP Dinakarrao 2024 37th International Conference on VLSI Design and 2024 23rd …, 2024 | 3 | 2024 |
| 3dl-pim: A look-up table oriented programmable processing in memory architecture based on the 3-d stacked memory for data-intensive applications PR Sutradhar, S Bavikadi, SMP Dinakarrao, MA Indovina, A Ganguly IEEE Transactions on Emerging Topics in Computing, 2023 | 3 | 2023 |
| ReApprox-PIM: Reconfigurable Approximate Look-Up-Table (LUT)-Based Processing-in-Memory (PIM) Machine Learning Accelerator S Bavikadi, PR Sutradhar, M Indovina, A Ganguly, SMP Dinakarrao IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2024 | 2 | 2024 |
| Flutpim: A look-up table-based processing in memory architecture with floating-point computation support for deep learning applications PR Sutradhar, S Bavikadi, M Indovina, SM Pudukotai Dinakarrao, ... Proceedings of the Great Lakes Symposium on VLSI 2023, 207-211, 2023 | 2 | 2023 |
| Accelerating adversarial attack using process-in-memory architecture S Liu, S Bavikadi, T Sen, H Shen, PR Sutradhar, A Ganguly, ... 2022 18th International Conference on Mobility, Sensing and Networking (MSN …, 2022 | 1 | 2022 |
| Flexible instruction set architecture for programmable look-up table based processing-in-memory M Connolly, PR Sutradhar, M Indovina, A Ganguly 2021 IEEE 39th International Conference on Computer Design (ICCD), 66-73, 2021 | 1 | 2021 |
| A Programmable Look-Up Table-Based Processing in Memory Architecture for Massively Parallel, Energy-Efficient Processing of Data-Intensive Applications Within DRAM PR Sutradhar Rochester Institute of Technology, 2024 | | 2024 |
| Neural network execution using nicked DNA and microfluidics A Solanki, Z Griffin, PR Sutradhar, K Pradhan, C Merritt, A Ganguly, ... Plos one 18 (10), e0292228, 2023 | | 2023 |
| Look-up table containing processor-in-memory cluster for data-intensive applications A Ganguly, SMP Dinakarrao, M Connolly, PR Sutradhar, S Bavikadi, ... US Patent 11,775,312, 2023 | | 2023 |
Amlan GangulyDepartment Head and Professor of Computer Engineering, Rochester Institute of Technology在 rit.edu 的电子邮件经过验证
