| A High-Performance Elliptic Curve Cryptographic Processor of SM2 over GF(p) X Hu, X Zheng, S Zhang, W Li, S Cai, X Xiong Electronics 8 (4), 431, 2019 | 38 | 2019 |
| A Low Hardware Consumption Elliptic Curve Cryptographic Architecture over GF(p) in Embedded Application X Hu, X Zheng, S Zhang, S Cai, X Xiong Electronics 7 (7), 104, 2018 | 37 | 2018 |
| The software/hardware co-design and implementation of SM2/3/4 encryption/decryption and digital signature system X Zheng, C Xu, X Hu, Y Zhang, X Xiong IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2019 | 30 | 2019 |
| A resources-efficient configurable accelerator for deep convolutional neural networks X Hu, Y Zeng, Z Li, X Zheng, S Cai, X Xiong IEEE Access 7, 72113-72124, 2019 | 24 | 2019 |
| Design space exploration for yolo neural network accelerator H Huang, Z Liu, T Chen, X Hu, Q Zhang, X Xiong Electronics 9 (11), 1921, 2020 | 16 | 2020 |
| A hardware-efficient computing engine for FPGA-based deep convolutional neural network accelerator X Li, H Huang, T Chen, H Gao, X Hu, X Xiong Microelectronics Journal 128, 105547, 2022 | 14 | 2022 |
| A high speed processor for elliptic curve cryptography over NIST prime field X Hu, X Li, X Zheng, Y Liu, X Xiong IET Circuits, Devices & Systems 16 (4), 350-359, 2022 | 11 | 2022 |
| An efficient and low-power design of the SM3 hash algorithm for IoT X Zheng, X Hu, J Zhang, J Yang, S Cai, X Xiong Electronics 8 (9), 1033, 2019 | 10 | 2019 |
| Tinna: A tiny accelerator for neural networks with efficient dsp optimization X Hu, X Li, H Huang, X Zheng, X Xiong IEEE Transactions on Circuits and Systems II: Express Briefs 69 (4), 2301-2305, 2022 | 6 | 2022 |
| Efficient field‐programmable gate array‐based reconfigurable accelerator for deep convolution neural network X Hu, T Chen, H Huang, Z Liu, X Li, X Xiong Electronics Letters 57 (6), 238-240, 2021 | 6 | 2021 |
| Subgraph feature extraction based on multi-view dictionary learning for graph classification X Zheng, S Liang, B Liu, X Xiong, X Hu, Y Liu Knowledge-Based Systems 214, 106716, 2021 | 6 | 2021 |
| An efficient loop tiling framework for convolutional neural network inference accelerators H Huang, X Hu, X Li, X Xiong IET circuits, devices & systems 16 (1), 116-123, 2022 | 5 | 2022 |
| Low-power reconfigurable architecture of elliptic curve cryptography for IoT X Hu, H Huang, X Zheng, Y Liu, X Xiong IEICE Transactions on Electronics 104 (11), 643-650, 2021 | 5 | 2021 |
| A tiny accelerator for mixed-bit sparse CNN based on efficient fetch method of simo SPad X Hu, X Liu, Y Liu, H Zhang, X Huang, X Guan, L Liang, CY Tsui, X Xiong, ... IEEE Transactions on Circuits and Systems II: Express Briefs 70 (8), 3079-3083, 2023 | 4 | 2023 |
| High-performance reconfigurable DNN accelerator on a bandwidth-limited embedded system X Hu, H Huang, X Li, X Zheng, Q Ren, J He, X Xiong ACM Transactions on Embedded Computing Systems 22 (6), 1-20, 2023 | 3 | 2023 |
| High Performance SM2 Elliptic Curve Cryptographic Processor over GF (p) X Hu, S Cai, R Zhan, X Xiong 2019 Chinese Control Conference (CCC), 8904-8908, 2019 | 2 | 2019 |
| TAC-RAM: A 65nm 4Kb SRAM Computing-in-Memory Design with 57.55 TOPS/W supporting Multibit Matrix-Vector Multiplication for Binarized Neural Network X Wang, X Liu, X Hu, X Zhong, X Chen, Y Liu, P Kong, F Tian, C Tsui 2022 IEEE 4th International Conference on Artificial Intelligence Circuits …, 2022 | 1 | 2022 |
| A digital signal processor‐efficient accelerator for depthwise separable convolution X Li, H Huang, Y Liu, X Hu, X Xiong Electronics Letters 58 (7), 271-273, 2022 | 1 | 2022 |
| An End-to-End Deep-Learning-Based Indirect Time-of-Flight Image Signal Processor A Xiong, Y Jiao, X Liu, M Yung, X Hu, L Liang, J Yuan, M Chan 2024 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2024 | | 2024 |
| An Efficient VCD Parser for Dynamic Power Estimation of Digital Integrated Circuits X Zheng, S Zeng, Y Zhong, C Huang, X Hu, X Xiong IEEE Embedded Systems Letters, 2024 | | 2024 |
