Recent thermal management techniques for microprocessors J Kong, SW Chung, K Skadron ACM Computing Surveys (CSUR) 44 (3), 1-42, 2012 | 263 | 2012 |
PUFatt: Embedded platform attestation based on novel processor-based PUFs J Kong, F Koushanfar, PK Pendyala, AR Sadeghi, C Wachsmann Proceedings of the 51st Annual Design Automation Conference, 1-6, 2014 | 116 | 2014 |
Artificial intelligence and data fusion at the edge A Munir, E Blasch, J Kwon, J Kong, A Aved IEEE Aerospace and Electronic Systems Magazine 36 (7), 62-78, 2021 | 67 | 2021 |
Enhancing online power estimation accuracy for smartphones M Kim, J Kong, SW Chung IEEE Transactions on Consumer Electronics 58 (2), 333-339, 2012 | 48 | 2012 |
Selective wordline voltage boosting for caches to manage yield under process variations Y Pan, J Kong, S Ozdemir, G Memik, SW Chung Proceedings of the 46th annual design automation conference, 57-62, 2009 | 46 | 2009 |
FogSurv: A fog-assisted architecture for urban surveillance using artificial intelligence and data fusion A Munir, J Kwon, JH Lee, J Kong, E Blasch, AJ Aved, K Muhammad IEEE Access 9, 111938-111959, 2021 | 42 | 2021 |
A survey on recent OS-level energy management techniques for mobile processing units YG Kim, J Kong, SW Chung IEEE Transactions on Parallel and Distributed Systems 29 (10), 2388-2401, 2018 | 35 | 2018 |
Low-cost application-aware DVFS for multi-core architecture J Kong, J Choi, L Choi, SW Chung 2008 Third International Conference on Convergence and Hybrid Information …, 2008 | 34 | 2008 |
Processor-based strong physical unclonable functions with aging-based response tuning J Kong, F Koushanfar IEEE Transactions on Emerging Topics in Computing 2 (1), 16-29, 2013 | 33 | 2013 |
On the thermal attack in instruction caches J Kong, JK John, EY Chung, SW Chung, J Hu IEEE Transactions on Dependable and Secure Computing 7 (2), 217-223, 2010 | 28 | 2010 |
An adaptive thermal management framework for heterogeneous multi-core processors YG Kim, M Kim, J Kong, SW Chung IEEE Transactions on Computers 69 (6), 894-906, 2020 | 27 | 2020 |
Architecting large-scale SRAM arrays with monolithic 3D integration J Kong, YH Gong, SW Chung 2017 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2017 | 26 | 2017 |
Quantifying the impact of monolithic 3D (M3D) integration on L1 caches YH Gong, J Kong, SW Chung IEEE Transactions on Emerging Topics in Computing 9 (2), 854-865, 2019 | 23 | 2019 |
Leveraging process variation for performance and energy: In the perspective of overclocking HB Jang, J Lee, J Kong, T Suh, SW Chung IEEE Transactions on Computers 63 (5), 1316-1322, 2012 | 19 | 2012 |
CPU-accelerator co-scheduling for CNN acceleration at the edge Y Kim, J Kong, A Munir IEEE Access 8, 211422-211433, 2020 | 15 | 2020 |
Exploiting narrow-width values for process variation-tolerant 3-D microprocessors J Kong, SW Chung Proceedings of the 49th Annual Design Automation Conference, 1197-1206, 2012 | 12 | 2012 |
A Dual Integer Register File Structure for Temperature-Aware Microprocessors JH Choi, JH Kong, EY Chung, SW Chung Journal of KIISE: Computer Systems and Theory 35 (12), 540-551, 2008 | 11 | 2008 |
An energy-efficient last-level cache architecture for process variation-tolerant 3D microprocessors J Kong, F Koushanfar, SW Chung IEEE Transactions on Computers 64 (9), 2460-2475, 2014 | 10 | 2014 |
Sparse convolutional neural network acceleration with lossless input feature map compression for resource‐constrained systems J Kwon, J Kong, A Munir IET Computers & Digital Techniques 16 (1), 29-43, 2022 | 8 | 2022 |
Fine-grain voltage tuned cache architecture for yield management under process variations J Kong, Y Pan, S Ozdemir, A Mohan, G Memik, SW Chung IEEE transactions on very large scale integration (VLSI) systems 20 (8 …, 2011 | 8 | 2011 |