| One-sided schmitt-trigger-based 9T SRAM cell for near-threshold operation K Cho, J Park, TW Oh, SO Jung IEEE Transactions on Circuits and Systems I: Regular Papers 67 (5), 1551-1561, 2020 | 99 | 2020 |
| Differential read/write 7T SRAM with bit-interleaved structure for near-threshold operation JS Oh, J Park, K Cho, TW Oh, SO Jung IEEE Access 9, 64105-64115, 2021 | 20 | 2021 |
| SRAM write assist circuit using cell supply voltage self-collapse with bitline charge sharing for near-threshold operation K Cho, J Park, K Kim, TW Oh, SO Jung IEEE Transactions on Circuits and Systems II: Express Briefs 69 (3), 1567-1571, 2021 | 9 | 2021 |
| SRAM write-and performance-assist cells for reducing interconnect resistance effects increased with technology scaling K Cho, H Choi, IJ Jung, J Oh, TW Oh, K Kim, G Kim, T Choi, C Sim, T Song, ... IEEE Journal of Solid-State Circuits 57 (4), 1039-1048, 2022 | 8 | 2022 |
| Integrated circuit including cell array with word line assist cells C Taemin, J Seongook, K Cho US Patent 11,670,360, 2023 | 3 | 2023 |
| Integrated circuit including cell array with write assist cell H Choi, C Taemin, J Seongook, K Cho US Patent 11,636,894, 2023 | 3 | 2023 |
| An Offset-Canceled Sense Amplifier for DRAMs With Hidden Offset-Cancellation Time and Boosted Internal-Voltage-Difference IJ Jung, TH Kim, K Cho, K Kim, SO Jung IEEE Transactions on Circuits and Systems II: Express Briefs 70 (9), 3243-3247, 2023 | 3 | 2023 |
| Local bit-line SRAM architecture with data-aware power-gating write assist TW Oh, J Park, TH Kim, K Cho, SO Jung IEEE Transactions on Circuits and Systems II: Express Briefs 70 (1), 306-310, 2022 | 2 | 2022 |
| Sram with improved write performance and write operation method thereof SO Jung, KH Cho, JS OH, MJ Yeo US Patent App. 18/168,943, 2023 | 1 | 2023 |
| A Static Contention-Free Dual-Edge-Triggered Flip-Flop with Redundant Internal Node Transition Elimination for Ultra-Low-Power Applications S Kim, K Cho, K Baek, H Kim, Y Bae, M Kim, D Seo, S Baeck, S Lee, ... 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2023 | 1 | 2023 |
| Variation-Tolerant Capacitive Coupling Sense Amplifier with Body Biasing Technique for High-Performance SRAM S Yei, K Cho, S Kim, J Oh, M Yeo, K Baek, SO Jung 2022 IEEE International Conference on Consumer Electronics-Asia (ICCE-Asia), 1-4, 2022 | 1 | 2022 |
| A 14-nm low voltage SRAM with charge-recycling and charge self-saving techniques for low-power applications K Cho, G Kim, J Oh, K Kim, C Sim, Y Bae, M Kim, S Baeck, T Song, ... 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and …, 2022 | 1 | 2022 |
| EMBEDDED MEMORY DEVICE AND OPERATING METHOD THEREOF H Kim, K Baek, S Jung, S Kim, K Cho US Patent App. 18/539,411, 2024 | | 2024 |
| A 14nm SRAM Using NMOS Header Assist Cell for Improved Write Ability and Reduced Cell Retention Leakage J Kang, K Cho, S Kim, G Kim, H Kim, D Seo, S Baeck, S Yoon, SO Jung 2024 IEEE European Solid-State Electronics Research Conference (ESSERC), 669-672, 2024 | | 2024 |
| Memory cell array of a static random access memory and a static random access memory including the same H Kim, S Kim, J Seongook, K Baek, K Cho US Patent App. 18/227,355, 2024 | | 2024 |
| 15.4 Self-Enabled Write-Assist Cells for High-Density SRAM in a Resistance-Dominated Technology Node M Yeo, K Cho, G Kim, WJ Jo, J Oh, S Kim, K Baek, S Park, SJ Yei, ... 2024 IEEE International Solid-State Circuits Conference (ISSCC) 67, 282-284, 2024 | | 2024 |
| Dual-edge-triggered flip-flop SO Jung, SK Kim, H Kim, KR Baek, K Cho US Patent App. 18/330,731, 2024 | | 2024 |
| Static random access memory (SRAM) devices and methods of operating the same C Taemin, J Seongook, K Cho US Patent 11,568,924, 2023 | | 2023 |
