| A Low Power All-Digital PLL With− 40dBc In-Band Fractional Spur Suppression for NB-IoT Applications N Yan, L Ma, Y Xu, S Chen, X Liu, J Xiang, H Min IEEE Access 7, 7897-7904, 2018 | 19 | 2018 |
| An active tag using carrier recovery circuit for EPC Gen2 passive UHF RFID systems T Yang, J Xiang, Y Wang, X Tan, J Wang, N Yan, L Zheng, H Min IEEE Transactions on Industrial Electronics 65 (11), 8925-8935, 2018 | 9 | 2018 |
| A low power TDC with 0.5 ps resolution for ADPLL in 40nm CMOS X Liu, L Ma, J Xiang, N Yan, H Xie, X Cai 2015 IEEE 11th international conference on ASIC (ASICON), 1-4, 2015 | 9 | 2015 |
| A fully logic CMOS compatible non-volatile memory for low power IoT applications Y Wang, J Xiang, X Chen, T Yang, N Yan, H Min 2015 5th International Conference on the Internet of Things (IOT), 98-103, 2015 | 6 | 2015 |
| An asynchronous delay line TDC for ADPLL in 0.13 um CMOS C Li, L Ma, J Xiang, H Min 2015 IEEE 11th International Conference on ASIC (ASICON), 1-4, 2015 | 3 | 2015 |
| Design of a wideband digitally controlled oscillator J Xiang, L Ma, L Zhu, H Min 2014 12th IEEE International Conference on Solid-State and Integrated …, 2014 | 2 | 2014 |
