FIRGEN: A computer-aided design system for high performance FIR filter integrated circuits R Jain, PT Yang, T Yoshino IEEE Transactions on Signal Processing 39 (7), 1655-1668, 1991 | 154 | 1991 |
Adaptive radio for multimedia wireless links C Chien, MB Srivastava, R Jain, P Lettieri, V Aggarwal, R Sternowski IEEE journal on selected areas in communications 17 (5), 793-813, 1999 | 151 | 1999 |
An integrated CAD system for algorithm-specific IC design CB Shung, R Jain, K Rimey, E Wang, MB Srivastava, BC Richards, ... IEEE transactions on computer-aided design of integrated circuits and …, 1991 | 144 | 1991 |
Performance analysis of an all-digital BPSK direct-sequence spread-spectrum IF receiver architecture BY Chung, C Chien, H Samueli, R Jain IEEE Journal on selected areas in communications 11 (7), 1096-1107, 1993 | 122 | 1993 |
DEFACTO: A design environment for adaptive computing technology K Bondalapati, P Diniz, P Duncan, J Granacki, M Hall, R Jain, H Ziegler International Parallel Processing Symposium, 570-578, 1999 | 111 | 1999 |
Custom design of a VLSI PCM-FDM transmultiplexer from system specifications to circuit layout using a computer-aided design system R Jain, F Catthoor, J Vanhoof, BJS De Loore, G Goossens, NF Goncalvez, ... IEEE journal of solid-state circuits 21 (1), 73-85, 1986 | 91 | 1986 |
A low power architecture for wireless multimedia systems: lessons learned from building a power hog W Mangione-Smith, PS Ghang, S Nazareth, P Lettieri, W Boring, R Jain Proceedings of 1996 International Symposium on Low Power Electronics and …, 1996 | 60 | 1996 |
Architectural strategies for an application-specific synchronous multiprocessor environment F Catthoor, J Rabaey, G Goossens, JL Van Meerbergen, R Jain, ... IEEE Transactions on Acoustics, Speech, and Signal Processing 36 (2), 265-284, 1988 | 58 | 1988 |
A 100-MHz 64-tap FIR digital filter in 0.8-mu m BiCMOS gate array T Yoshino, R Jain, PT Yang, H Davis, W Gass, AH Shah IEEE Journal of Solid-State Circuits 25 (6), 1494-1501, 1990 | 55 | 1990 |
Techniques for FPGA implementation of video compression systems B Schoner, J Villasenor, S Molloy, R Jain Proceedings of the 1995 ACM third international symposium on Field …, 1995 | 48 | 1995 |
A single-chip 12.7 Mchips/s digital IF BPSK direct sequence spread-spectrum transceiver in 1.2/spl mu/m CMOS C Chien, R Jain, EG Cohen, H Samueli IEEE Journal of Solid-State Circuits 29 (12), 1614-1623, 1994 | 45 | 1994 |
Computer-aided design of a BPSK spread-spectrum chip set R Jain, H Samueli, PT Yang, C Chien, GG Chen, LK Lau, BY Chung, ... IEEE journal of solid-state circuits 27 (1), 44-58, 1992 | 40 | 1992 |
An integrated circuit design for pruned tree-search vector quantization encoding with an off-chip controller R Jain, A Madisetti, RL Baker IEEE Transactions on circuits and systems for video technology 2 (2), 147-158, 1992 | 37 | 1992 |
PC-notebook based mobile networking: Algorithms, Architectures and Implementation R Jain, J Short, S Nazareth, L Kleinrock, J Villasenor Proceedings IEEE International Conference on Communications ICC'95 2, 771-777, 1995 | 26 | 1995 |
Efficient CAD tools for the coefficient optimisation of arbitrary integrated digital filters R Jain, J Vandewalle, H De Man ICASSP'84. IEEE International Conference on Acoustics, Speech, and Signal …, 1984 | 26 | 1984 |
An optimal and flexible delay management technique for VLSI G Goossens, R Jain, J Vandewalle, H De Man Proc. of the Mathematical Theory of Networks and Systems Symposium (MTNS'85 …, 1986 | 24 | 1986 |
Automated Design of Analog Circuits using Reinforcement Learning K Settaluri, Z Liu, R Khurana, A Mirhaj, R Jain, B Nikolic IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2021 | 23 | 2021 |
Automatic layout generation of real-time digital image processing circuits PA Ruetz, R Jain, CS Shung, JM Rabaey, GM Jacobs, RW Brodersen Proc. CICC, 111-115, 1986 | 23 | 1986 |
A functional silicon compiler for high speed FIR digital filters PT Yang, R Jain, T Yoshino, W Gass, A Shah International Conference on Acoustics, Speech, and Signal Processing, 1329-1332, 1990 | 21 | 1990 |
Hi-PASS: a computer-aided synthesis system for maximally parallel digital signal processing ASICs P Duncan, S Swamy, S Sprouse, D Potasz, R Jain, N Gafter, W Cammack, ... Proc. of IEEE Intern. Conf. on Acoustics, Speech and Signal Processing …, 1992 | 18 | 1992 |