| A digital calibration technique for charge pumps in phase-locked systems CF Liang, SH Chen, SI Liu IEEE Journal of Solid-State Circuits 43 (2), 390-398, 2008 | 134 | 2008 |
| 15.3 A 2.4 GHz ADPLL with digital-regulated supply-noise-insensitive and temperature-self-compensated ring DCO YC Huang, CF Liang, HS Huang, PY Wang 2014 IEEE International Solid-State Circuits Conference Digest of Technical …, 2014 | 93 | 2014 |
| An injection-locked ring PLL with self-aligned injection window CF Liang, KJ Hsiao 2011 IEEE International Solid-State Circuits Conference, 90-92, 2011 | 93 | 2011 |
| A 14-band frequency synthesizer for MB-OFDM UWB application CF Liang, SI Liu, YH Chen, TY Yang, GK Ma 2006 IEEE International Solid State Circuits Conference-Digest of Technical …, 2006 | 80 | 2006 |
| Spur-suppression techniques for frequency synthesizers CF Liang, HH Chen, SI Liu IEEE Transactions on Circuits and Systems II: Express Briefs 54 (8), 653-657, 2007 | 46 | 2007 |
| Phase frequency detector and phase-locked loop S Liu, CF Liang, HH Chen US Patent 7,592,847, 2009 | 44 | 2009 |
| A 10Gbps burst-mode CDR circuit in 0.18 μm CMOS C Liang, S Hwu, S Liu IEEE Custom Integrated Circuits Conference 2006, 599-602, 2006 | 35 | 2006 |
| A calibrated pulse generator for impulse-radio UWB applications CF Liang, ST Liu, SI Liu IEEE Journal of Solid-State Circuits 41 (11), 2401-2407, 2006 | 33 | 2006 |
| A wideband fractional-N ring PLL with fractional-spur suppression using spectrally shaped segmentation TK Kao, CF Liang, HH Chiu, M Ashburn 2013 IEEE International Solid-State Circuits Conference Digest of Technical …, 2013 | 32 | 2013 |
| 10.8 A wideband fractional-N ring PLL using a near-ground pre-distorted switched-capacitor loop filter CF Liang, PY Wang 2015 IEEE International Solid-State Circuits Conference-(ISSCC) Digest of …, 2015 | 22 | 2015 |
| Multi-band burst-mode clock and data recovery circuit CF Liang, SC Hwu, SI Liu US Patent 8,228,126, 2012 | 21 | 2012 |
| A 20/10/5/2.5 Gb/s power-scaling burst-mode CDR circuit using GVCO/Div2/DFF tri-mode cells CF Liang, SI Liu 2008 IEEE International Solid-State Circuits Conference-Digest of Technical …, 2008 | 21 | 2008 |
| Methods for calibrating gated oscillator and oscillator circuit utilizing the same CF Liang, SC Hwu, YH Tu US Patent 8,258,830, 2012 | 18 | 2012 |
| 10-Gb/s inductorless CDRs with digital frequency calibration CF Liang, HL Chu, SI Liu IEEE Transactions on Circuits and Systems I: Regular Papers 55 (9), 2514-2524, 2008 | 18 | 2008 |
| Switched-capacitor loop filter CF Liang US Patent 10,326,458, 2019 | 15 | 2019 |
| Injection-locked phase-locked loop with a self-aligned injection window CF Liang, KJ Hsiao US Patent 8,432,198, 2013 | 15 | 2013 |
| Application of rough set theory in coal gangue image process XM Ma, C Liang 2009 Fifth International Conference on Information Assurance and Security 1 …, 2009 | 15 | 2009 |
| Segmented fractional-n pll TK Kao, CF Liang, MA Ashburn Jr US Patent 8,653,869, 2014 | 14 | 2014 |
| A jitter-tolerance-enhanced CDR using a GDCO-based phase detector CF Liang, SC Hwu, SI Liu IEEE journal of solid-state circuits 43 (5), 1217-1226, 2008 | 14 | 2008 |
| A reference-free, digital background calibration technique for gated-oscillator-based CDR/PLL CF Liang, SC Hwu, YH Tu, YL Yang, HS Li 2009 Symposium on VLSI Circuits, 14-15, 2009 | 12 | 2009 |
