Transactional memory T Harris, JR Larus, R Rajwar Morgan & Claypool, 2010 | 686 | 2010 |
Speculative lock elision: Enabling highly concurrent multithreaded execution R Rajwar, JR Goodman Proceedings. 34th ACM/IEEE International Symposium on Microarchitecture …, 2001 | 663 | 2001 |
Transactional memory JR Larus, R Rajwar Springer Nature, 2022 | 597 | 2022 |
Virtualizing transactional memory R Rajwar, M Herlihy, K Lai 32nd International Symposium on Computer Architecture (ISCA'05), 494-505, 2005 | 589 | 2005 |
Transactional lock-free execution of lock-based programs R Rajwar, JR Goodman ACM SIGOPS Operating Systems Review 36 (5), 5-17, 2002 | 452 | 2002 |
Checkpoint processing and recovery: Towards scalable large instruction window processors H Akkary, R Rajwar, ST Srinivasan Proceedings. 36th Annual IEEE/ACM International Symposium on …, 2003 | 394 | 2003 |
The impact of performance asymmetry in emerging multicore architectures S Balakrishnan, R Rajwar, M Upton, K Lai 32nd International Symposium on Computer Architecture (ISCA'05), 506-517, 2005 | 374 | 2005 |
Performance Evaluation of Intel(R) Transactional Synchronization Extensions for High-Performance Computing R Yoo, C Hughes, K Lai, R Rajwar Supercomputing 2013, 2013 | 366 | 2013 |
Haswell: The Fourth-Generation Intel Core Processor P Hammarlund, AJ Martinez, AA Bajwa, DL Hill, E Hallnor, H Jiang, ... IEEE MICRO 34 (2), 2014 | 361 | 2014 |
Continual flow pipelines ST Srinivasan, R Rajwar, H Akkary, A Gandhi, M Upton ACM SIGARCH Computer Architecture News 32 (5), 107-119, 2004 | 260 | 2004 |
An architectural evaluation of Java TPC-W HW Cain, R Rajwar, M Marden, MH Lipasti Proceedings HPCA Seventh International Symposium on High-Performance …, 2001 | 189 | 2001 |
Hardware atomicity for reliable software speculation N Neelakantam, R Rajwar, S Srinivas, U Srinivasan, C Zilles Proceedings of the 34th Annual International Symposium on Computer …, 2007 | 93 | 2007 |
Scalable load and store processing in latency tolerant processors A Gandhi, H Akkary, R Rajwar, ST Srinivasasn, K Lai 32nd International Symposium on Computer Architecture (ISCA'05), 446-457, 2005 | 86 | 2005 |
Improving In-Memory Database Index Performance with Intel(R) Transactional Synchronization Extensions T Karnagel, R Dementiev, R Rajwar, K Lai, T Legler, B Schlegel, ... 20th International Symposium on High-Performance Computer Architecture, 2014 | 85 | 2014 |
Improving the throughput of synchronization by insertion of delays R Rajwar, A Kagi, JR Goodman Proceedings Sixth International Symposium on High-Performance Computer …, 2000 | 52 | 2000 |
Characterizing a Java implementation of TPC-W T Bezenek, T Cain, R Dickson, T Heil, M Martin, C McCurdy, R Rajwar, ... Proceedings of the Third Workshop On Computer Architecture Evaluation Using …, 2000 | 51 | 2000 |
Transactional execution: Toward reliable, high-performance multithreading R Rajwar, J Goodman IEEE Micro 23 (6), 117-125, 2003 | 48 | 2003 |
Intel Transactional Synchronization Extensions R Rajwar, M Dixon Intel Developer Forum (IDF) 2012, 2012 | 44 | 2012 |
An analysis of a resource efficient checkpoint architecture H Akkary, R Rajwar, ST Srinivasan ACM Transactions on Architecture and Code Optimization (TACO) 1 (4), 418-444, 2004 | 39 | 2004 |
Transactional memory and the birthday paradox C Zilles, R Rajwar Proceedings of the nineteenth annual ACM symposium on Parallel algorithms …, 2007 | 36 | 2007 |