| An advanced contrast enhancement using partially overlapped sub-block histogram equalization JY Kim, LS Kim, SH Hwang IEEE transactions on circuits and systems for video technology 11 (4), 475-484, 2001 | 1156 | 2001 |
| 64-bit carry-select adder with reduced area Y Kim, LS Kim Electronics Letters 37 (10), 1, 2001 | 333 | 2001 |
| A 200 MHz 13 mm/sup 2/2-D DCT macrocell using sense-amplifying pipeline flip-flop scheme M Matsui, H Hara, Y Uetani, LS Kim, T Nagamatsu, Y Watanabe, A Chiba, ... IEEE Journal of Solid-State Circuits 29 (12), 1482-1490, 1994 | 215 | 1994 |
| 14.6 a 1.42 tops/w deep convolutional neural network recognition processor for intelligent ioe systems J Sim, JS Park, M Kim, D Bae, Y Choi, LS Kim 2016 IEEE International Solid-State Circuits Conference (ISSCC), 264-265, 2016 | 200 | 2016 |
| Winscale: An image-scaling algorithm using an area pixel model CH Kim, SM Seong, JA Lee, LS Kim IEEE Transactions on circuits and systems for video technology 13 (6), 549-553, 2003 | 194 | 2003 |
| A low-power SRAM using hierarchical bit line and local sense amplifiers BD Yang, LS Kim IEEE journal of solid-state circuits 40 (6), 1366-1376, 2005 | 158 | 2005 |
| Metastability of CMOS latch/flip-flop LS Kim, RW Dutton IEEE Journal of solid-state circuits 25 (4), 942-951, 1990 | 146 | 1990 |
| An 800-MHz low-power direct digital frequency synthesizer with an on-chip D/A converter BD Yang, JH Choi, SH Han, LS Kim, HK Yu IEEE Journal of solid-state circuits 39 (5), 761-774, 2004 | 132 | 2004 |
| A low power carry select adder with reduced area Y Kim, LS Kim ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems …, 2001 | 96 | 2001 |
| NUAT: A non-uniform access time memory controller W Shin, J Yang, J Choi, LS Kim 2014 IEEE 20th International Symposium on High Performance Computer …, 2014 | 86 | 2014 |
| 200 MHz video compression macrocells using low-swing differential logic M Matsui, H Hara, K Seta, Y Uetani, LS Kim, T Nagamatsu, T Shimazawa, ... Proceedings of IEEE International Solid-State Circuits Conference-ISSCC'94 …, 1994 | 75 | 1994 |
| A 5-Gb/s/pin transceiver for DDR memory interface with a crosstalk suppression scheme KI Oh, LS Kim, KI Park, YH Jun, JS Choi, K Kim IEEE journal of solid-state circuits 44 (8), 2222-2232, 2009 | 74 | 2009 |
| A low-power CAM using pulsed NAND-NOR match-line and charge-recycling search-line driver BD Yang, LS Kim IEEE Journal of Solid-State Circuits 40 (8), 1736-1744, 2005 | 72 | 2005 |
| A 250-MHz-2-GHz wide-range delay-locked loop BG Kim, LS Kim IEEE Journal of Solid-State Circuits 40 (6), 1310-1321, 2005 | 71 | 2005 |
| Multiple clone row DRAM: A low latency and area optimized DRAM J Choi, W Shin, J Jang, J Suh, Y Kwon, Y Moon, LS Kim ACM SIGARCH Computer Architecture News 43 (3S), 223-234, 2015 | 67 | 2015 |
| An SoC with 1.3 Gtexels/s 3-D graphics full pipeline for consumer applications D Kim, K Chung, CH Yu, CH Kim, I Lee, J Bae, YJ Kim, JH Park, S Kim, ... IEEE journal of solid-state circuits 41 (1), 71-84, 2005 | 64 | 2005 |
| A low-power ROM using charge recycling and charge sharing techniques BD Yang, LS Kim IEEE Journal of Solid-State Circuits 38 (4), 641-653, 2003 | 53 | 2003 |
| An energy-efficient deep convolutional neural network inference processor with enhanced output stationary dataflow in 65-nm CMOS J Sim, S Lee, LS Kim IEEE Transactions on Very Large Scale Integration (VLSI) Systems 28 (1), 87-100, 2019 | 51 | 2019 |
| Nand-net: Minimizing computational complexity of in-memory processing for binary neural networks H Kim, J Sim, Y Choi, LS Kim 2019 IEEE international symposium on high performance computer architecture …, 2019 | 43 | 2019 |
| Charge-pump reducing current mismatch in DLLs and PLLs KS Ha, LS Kim 2006 IEEE International Symposium on Circuits and Systems (ISCAS), 4 pp., 2006 | 43 | 2006 |
