关注
Viraj Rawal
Viraj Rawal
Sardar Vallbhbhai Patel National Institute of Technology, Surat
在 eced.svnit.ac.in 的电子邮件经过验证
标题
引用次数
引用次数
年份
Hardware implementation of 1D-CNN architecture for ECG arrhythmia classification
V Rawal, P Prajapati, A Darji
Biomedical Signal Processing and Control 85, 104865, 2023
382023
Design Implementation of High-Performance Line Following Robot
M Shah, V Rawal, J Dalwadi
2017 International Conference on Transforming Engineering Education (ICTEE), 1-5, 2017
62017
系统目前无法执行此操作,请稍后再试。
文章 1–2