| On Modeling and Detecting Trojans in Instruction Sets Y Zhang, A He, J Li, A Rezine, Z Peng, E Larsson, T Yang, J Jiang, H Li IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2024 | | 2024 |
| Verification-Friendly Deep Neural Networks A Baninajjar, A Rezine, A Aminifar arXiv preprint arXiv:2312.09748, 2023 | | 2023 |
| SafeDeep: A Scalable Robustness Verification Framework for Deep Neural Networks A Baninajjar, K Hosseini, A Rezine, A Aminifar ICASSP 2023-2023 IEEE International Conference on Acoustics, Speech and …, 2023 | 4 | 2023 |
| Symbolic identification of shared memory based bank conflicts for GPUs A Horga, A Rezine, S Chattopadhyay, P Eles, Z Peng Journal of Systems Architecture 127, 102518, 2022 | 7 | 2022 |
| Correction to: An integrated specification and verification technique for highly concurrent data structures AP Aziz, H Frédéric, H Lukáš, J Bengt, R Ahmed International Journal on Software Tools for Technology Transfer 23 (5), 825-825, 2021 | | 2021 |
| Verifying safety of parameterized heard-of algorithms Z Ganjei, A Rezine, P Eles, Z Peng Networked Systems: 8th International Conference, NETYS 2020, Marrakech …, 2021 | 1 | 2021 |
| Breaking silos to guarantee control stability with communication over ethernet TSN R Mahfouzi, A Aminifar, S Samii, A Rezine, P Eles, Z Peng IEEE Design & Test 38 (5), 48-56, 2020 | 9 | 2020 |
| Quantifying the information leakage in cache attacks via symbolic execution S Chattopadhyay, M Beck, A Rezine, A Zeller ACM Transactions on Embedded Computing Systems (TECS) 18 (1), 1-27, 2019 | 51 | 2019 |
| Software-based self-testing using bounded model checking for out-of-order superscalar processors Y Zhang, K Chakrabarty, Z Peng, A Rezine, H Li, P Eles, J Jiang IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2019 | 15 | 2019 |
| On reachability in parameterized phaser programs Z Ganjei, A Rezine, L Henrio, P Eles, Z Peng Tools and Algorithms for the Construction and Analysis of Systems: 25th …, 2019 | 2 | 2019 |
| Trau: SMT solver for string constraints PA Abdulla, MF Atig, YF Chen, BP Diep, L Holík, A Rezine, P Rümmer 2018 Formal Methods in Computer Aided Design (FMCAD), 1-5, 2018 | 45 | 2018 |
| Software Model Checking in the Multicore Era A Rezine | | 2018 |
| Stability-aware integrated routing and scheduling for control applications in Ethernet networks R Mahfouzi, A Aminifar, S Samii, A Rezine, P Eles, Z Peng 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), 682-687, 2018 | 72 | 2018 |
| Safety verification of phaser programs Z Ganjei, A Rezine, P Eles, Z Peng 2017 Formal Methods in Computer Aided Design (FMCAD), 68-75, 2017 | 4 | 2017 |
| An integrated specification and verification technique for highly concurrent data structures PA Abdulla, F Haziza, L Holík, B Jonsson, A Rezine International Journal on Software Tools for Technology Transfer 19 (5), 549-563, 2017 | 66 | 2017 |
| Flatten and conquer: a framework for efficient analysis of string constraints PA Abdulla, MF Atig, YF Chen, BP Diep, L Holík, A Rezine, P Rümmer ACM SIGPLAN Notices 52 (6), 602-617, 2017 | 58 | 2017 |
| Quantifying the information leak in cache attacks through symbolic execution S Chattopadhyay, M Beck, A Rezine, A Zeller arXiv preprint arXiv:1611.04426, 2016 | 6 | 2016 |
| Counting dynamically synchronizing processes Z Ganjei, A Rezine, P Eles, Z Peng International Journal on Software Tools for Technology Transfer 18, 517-534, 2016 | 6 | 2016 |
| Lazy constrained monotonic abstraction Z Ganjei, A Rezine, P Eles, Z Peng Verification, Model Checking, and Abstract Interpretation: 17th …, 2016 | 4 | 2016 |
| Verification of cache coherence protocols wrt. trace filters PA Abdulla, MF Atig, Z Ganjeiy, A Reziney, Y Zhu 2015 Formal Methods in Computer-Aided Design (FMCAD), 9-16, 2015 | 7 | 2015 |
