| Combined on-package and off-package memory system N Chatterjee, JM O'connor, D Lee, G Uttreja, WA Gandhi US Patent 12,001,725, 2024 | | 2024 |
| Reducing coupling and power noise on PAM-4 I/O interface D Lee, JM O'connor US Patent 11,966,348, 2024 | | 2024 |
| Symphony: Orchestrating sparse and dense tensors with hierarchical heterogeneous processing M Pellauer, J Clemons, V Balaji, N Crago, A Jaleel, D Lee, M O’Connor, ... ACM Transactions on Computer Systems 41 (1-4), 1-30, 2023 | 4 | 2023 |
| Combined on-package and off-package memory system N Chatterjee, JM O'connor, D Lee, G Uttreja, WA Gandhi US Patent 11,789,649, 2023 | | 2023 |
| Techniques for generating and processing hierarchical representations of sparse matrices H Wang, JM O'connor, D Lee US Patent 11,709,812, 2023 | | 2023 |
| Memory interface with reduced energy transmit mode JM O'connor, D Lee US Patent App. 17/668,226, 2023 | | 2023 |
| Techniques for performing matrix computations using hierarchical representations of sparse matrices H Wang, JM O'connor, D Lee US Patent App. 17/325,116, 2022 | | 2022 |
| Techniques for accelerating matrix multiplication computations using hierarchical representations of sparse matrices H Wang, JM O'connor, D Lee US Patent App. 17/325,120, 2022 | | 2022 |
| Saving PAM4 bus energy with SMOREs: Sparse multi-level opportunistic restricted encodings M O’Connor, D Lee, N Chatterjee, MB Sullivan, SW Keckler 2022 IEEE International Symposium on High-Performance Computer Architecture …, 2022 | 2 | 2022 |
| Data bus inversion (DBI) on pulse amplitude modulation (PAM) and reducing coupling and power noise on PAM-4 I/O D Lee, JM O'connor, J Wilson US Patent 11,159,153, 2021 | 11 | 2021 |
| Characterizing and mitigating soft errors in gpu dram MB Sullivan, N Saxena, M O'Connor, D Lee, P Racunas, S Hukerikar, ... MICRO-54: 54th Annual IEEE/ACM International Symposium on Microarchitecture …, 2021 | 38 | 2021 |
| Learning sparse matrix row permutations for efficient spmm on gpu architectures A Mehrabi, D Lee, N Chatterjee, DJ Sorin, BC Lee, M O'Connor 2021 IEEE International Symposium on Performance Analysis of Systems and …, 2021 | 20 | 2021 |
| Relaxed 433 encoding to reduce coupling and power noise on PAM-4 data buses D Lee, JM O'connor, J Wilson US Patent 10,657,094, 2020 | 5 | 2020 |
| 424 encoding schemes to reduce coupling and power noise on PAM-4 data buses D Lee, JM O'connor, J Wilson US Patent 10,599,606, 2020 | 8 | 2020 |
| Unrelaxed 433 encoding to reduce coupling and power noise on PAM-4 data buses D Lee, JM O'connor, J Wilson US Patent 10,491,435, 2019 | 9 | 2019 |
| Near-memory data transformation for efficient sparse matrix multi-vector multiplication D Fujiki, N Chatterjee, D Lee, M O'Connor Proceedings of the International Conference for High Performance Computing …, 2019 | 22 | 2019 |
| DeLTA: GPU performance model for deep learning applications with in-depth memory system traffic analysis S Lym, D Lee, M O'Connor, N Chatterjee, M Erez 2019 IEEE international symposium on performance analysis of systems and …, 2019 | 44 | 2019 |
| What your DRAM power models are not telling you: Lessons from a detailed experimental study S Ghose, AG Yaglikçi, R Gupta, D Lee, K Kudrolli, WX Liu, H Hassan, ... Proceedings of the ACM on Measurement and Analysis of Computing Systems 2 (3 …, 2018 | 138 | 2018 |
| Exploiting Row-Level Temporal Locality in DRAM to Reduce the Memory Access Latency H Hassan, G Pekhimenko, N Vijaykumar, V Seshadri, D Lee, O Ergin, ... arXiv preprint arXiv:1805.03969, 2018 | 1 | 2018 |
| Voltron: Understanding and Exploiting the Voltage-Latency-Reliability Trade-Offs in Modern DRAM Chips to Improve Energy Efficiency KK Chang, AG Yaglıkçı, S Ghose, A Agrawal, N Chatterjee, A Kashyap, ... arXiv preprint arXiv:1805.03175, 2018 | 9 | 2018 |
Onur MutluETH Zürich and Carnegie Mellon University在 inf.ethz.ch 的电子邮件经过验证
