| 12 IBM—PowerNP Network M Peyravian, J Calvignac, R Sabhikhi Network Processor Design: Issues and Practices 1, 85, 2003 | | 2003 |
| 9 An Industry Analyst's Perspective on Network Processors John Freeman 10 Agere Systems—Communications Optimized PayloadPlus Network Processor Architecture B Klein, J Garza, J Marshall, M Peyravian, J Calvignac, R Sabhikhi, ... Network Processor Design: Issues and Practices 1, 25, 2003 | | 2003 |
| Accelerating data packet parsing F Abel, JL Calvignac, CJ Chang, P Damon, FJ Verplanken US Patent 8,867,395, 2014 | 12 | 2014 |
| Accelerating data packet parsing F Abel, JL Calvignac, CJ Chang, P Damon, FJ Verplanken US Patent 8,854,996, 2014 | | 2014 |
| Accessing an effective address and determining whether the effective address is associated with remotely coupled I/O adapters RK Arimilli, C Basso, JL Calvignac, EJ Seminaro US Patent 7,844,746, 2010 | 27 | 2010 |
| Active remote module for the attachment of user equipments to a communication processing unit M Badaoui, J Calvignac, G Carle, C Garcia, P Vachee US Patent 5,237,572, 1993 | 5 | 1993 |
| Adaptative packet/circuit switched transportation method and system J Calvignac, P Secondo US Patent 4,761,781, 1988 | 42 | 1988 |
| Adaptive packet and circuit switching J Calvignac, J Jamain, CER IBM-France COMPEURO 89 Proceedings VLSI and Computer Peripherals., 4/6-4/9, 1989 | | 1989 |
| Address generating device for a communication line scanning device J Calvignac, Y Granger, A Masclet US Patent 4,491,913, 1985 | 4 | 1985 |
| Alternate representation of integers for efficient implementation of addition of a sequence of multiprecision integers C Basso, J Calvignac, N Vaidhyanathan, F Verplanken US Patent App. 11/142,937, 2006 | 4 | 2006 |
| Analysis of network packets using a generated hash code C Basso, JL Calvignac, N Vaidhyanathan, F Verplanken US Patent 9,178,814, 2015 | 11 | 2015 |
| Analysis of network packets using a generated hash code C Basso, JL Calvignac, N Vaidhyanathan, F Verplanken US Patent App. 13/325,597, 2012 | 9 | 2012 |
| Apparatus and method for efficiently modifying network data frames C Basso, JL Calvignac, CJ Chang, FJ Verplanken US Patent 7,522,621, 2009 | | 2009 |
| Apparatus and method for efficiently sharing memory bandwidth in a network processor PIA Barri, JL Calvignac, MC Heddes, JF Logan, AMM Niemegeers, ... US Patent 6,757,795, 2004 | 24 | 2004 |
| Apparatus for blind checksum and correction for network transmissions C Basso, JL Calvignac, CJ Chang, P Damon, RE Fuhs, N Vaidhyanathan, ... US Patent 8,225,188, 2012 | 7 | 2012 |
| Apparatus for generating and checking the error correction codes of messages in a message switching system PJ Huon, P Jachimcsyk, G Barucchi, J Calvignac, F Verplanken US Patent 5,467,359, 1995 | 5 | 1995 |
| Apparatus for recovering lost buffer contents in a data processing system D Chevalier, J Calvignac, JM Munier, B Naudin, M Duault US Patent 5,572,697, 1996 | 12 | 1996 |
| Apparatus, method and limited set of messages to transmit data between components of a network processor JL Calvignac, M Heddes, JF Logan US Patent 7,085,266, 2006 | 22 | 2006 |
| Apparatus, method and limited set of messages to transmit data between scheduler and a network processor JL Calvignac, M Heddes, JF Logan US Patent 7,149,212, 2006 | 38 | 2006 |
| Apparatus, method and program product to generate and use CRC in communications network JJ Allen Jr, JL Calvignac, N Vaidhyanathan, FJ Verplanken US Patent 7,336,667, 2008 | 64 | 2008 |
