A “powerful” issue! R Gupta IEEE Design & Test of Computers 20 (3), 1-1, 2003 | | 2003 |
A behavioural type inference system for compositional system-on-chip design JP Talpin, D Berner, P Le Guernic, A Gamatié, S Kumar Shukla, R Gupta Application of Concurrency to System Design, 2004. ACSD 2004. Proceedings …, 2004 | 11 | 2004 |
A case analysis of system partitioning and its relationship to high-level synthesis tasks Z Yang, RK Gupta Proceedings Eleventh International Conference on VLSI Design, 442-448, 1998 | 3 | 1998 |
A co-synthesis approach to embedded system design automation RK Gup, G De Micheli Design Automation for Embedded Systems 1, 69-120, 1996 | 87 | 1996 |
A compositional behavioral modeling framework for embedded system design and conformance checking JP Talpin, PL Guernic, SK Shukla, R Gupta International Journal of Parallel Programming 33, 613-643, 2005 | 16 | 2005 |
A cross-layer approach for power-performance optimization in distributed mobile systems S Mohapatra, R Cornea, H Oh, K Lee, M Kim, N Dutt, R Gupta, A Nicolau, ... 19th IEEE International Parallel and Distributed Processing Symposium, 8 pp., 2005 | 80 | 2005 |
A framework for interactive analysis of timing constraints in embedded systems RK Gupta Proceedings of the 4th International Workshop on Hardware/Software Co-Design, 44, 1996 | 17 | 1996 |
A Frameworkfor Interactive Analysis of Timing Constraints in Embedded Systems RK Gupta | | |
A gateway node with duty-cycled radio and processing subsystems for wireless sensor networks ZY Jin, C Schurgers, RK Gupta ACM Transactions on Design Automation of Electronic Systems (TODAES) 14 (1), 5, 2009 | 13 | 2009 |
A general approach for regularity extraction in datapath circuits A Chowdhary, S Kale, P Saripella, N Sehgal, R Gupta Computer-Aided Design, 1998. ICCAD 98. Digest of Technical Papers. 1998 IEEE …, 1998 | 71 | 1998 |
A General Approach for Regularity Extraction in Datapath Circuits ACSKP Saripella, N Sehgal, R Gupta Proc. Int'l Conf. Computer-Aided Design 10 (288548.289050), 1998 | 1 | 1998 |
A methodology for synthesis of data path circuits A Chowdhary, RK Gupta IEEE Design & Test of Computers 19 (6), 90-100, 2002 | 7 | 2002 |
A model checking approach to evaluating system level dynamic power management policies for embedded systems SK Shukla, RK Gupta High-Level Design Validation and Test Workshop, 2001. Proceedings. Sixth …, 2001 | 73 | 2001 |
A model checking approach to evaluating system level power management policies for embedded systems S Shukla, R Gupta the Proceedings of IEEE Conference on High Level Design Validation, 2001 | 7 | 2001 |
A Model-Based Approach to System Specification for Distributed Real-time and Embedded Systems R Cornea, S Mohapatra, N Dutt, R Gupta, I Krueger, A Nicolau, D Schmidt, ... MDES, 2003 | 1 | 2003 |
A Network-Oriented RTOS Framework H Du, R Gupta | | 2000 |
A power-aware API for embedded and portable systems C Pereira, R Gupta, P Spanos, M Srivastava Power Aware Computing, 153-166, 2002 | 3 | 2002 |
A procedure for software synthesis from VHDL models V Krishnaswamy, R Gupta, P Banerjee Proceedings of ASP-DAC'97: Asia and South Pacific Design Automation …, 1997 | 3 | 1997 |
A Quantative Evaluation of Adaptive Memory Hierarchy. UC H Du, P D'Alberto, R Gupta Irvine, Technical Report ICS-TR-01-41, 2001 | 2 | 2001 |
A realtime, open-source speech-processing platform for research in hearing loss compensation H Garudadri, A Boothroyd, CH Lee, S Gadiyaram, J Bell, D Sengupta, ... 2017 51st Asilomar Conference on Signals, Systems, and Computers, 1900-1904, 2017 | 12 | 2017 |