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Andre DeHon
Andre DeHon
University of Pennsylvania
在 acm.org 的电子邮件经过验证 - 首页
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引用次数
引用次数
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{TEGRA}: Efficient {Ad-Hoc} analytics on evolving graphs
AP Iyer, Q Pu, K Patel, JE Gonzalez, I Stoica
18th USENIX Symposium on Networked Systems Design and Implementation (NSDI …, 2021
322021
: Spatial Processors Interconnected for Concurrent Execution for Accelerating the SPICE Circuit Simulator Using an FPGA
N Kapre, A DeHon
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2011
312011
06361 Abstracts Collection--Computing Media Languages for Space-Oriented Computation
A DeHon, JL Giavitto, F Gruau
Dagstuhl Seminar Proceedings, 2007
7*2007
06361 executive report–computing media languages for space-oriented computation
A DeHon, JL Giavitto, F Gruau
Schloss-Dagstuhl-Leibniz Zentrum für Informatik, 2007
162007
1 volt digital logic circuits realized by stress-resilient AlN parallel dual-beam MEMS relays
N Sinha, Z Guo, A Tazzoli, A DeHon, G Piazza
2012 IEEE 25th International Conference on Micro Electro Mechanical Systems …, 2012
212012
11.1 Revising the Model
A DeHon
Into The Nano Era: Moore's Law Beyond Planar Silicon CMOS 106, 281, 2008
2008
2021 IEEE 29th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)| 978-1-6654-3555-0/20/$31.00© 2021 IEEE| DOI: 10.1109/FCCM51124. 2021.00065
A Abdelhadi, R Appen, G Araujo, C Augustine, R Balasubramonian, ...
2022 32nd International Conference on Field-Programmable Logic and Applications (FPL)| 978-1-6654-7390-3/22/$31.00© 2022 IEEE| DOI: 10.1109/FPL57034. 2022.00081
MAA Abdelgawad, H Amano, J Anderson, CD Antonopoulos, YF Arthanto, ...
3D nanowire-based programmable logic
B Gojman, R Rubin, C Pilotto, A DeHon, T Tanamoto
2006 1st international conference on nano-networks and workshops, 1-5, 2006
2502006
5.32. ARRAY-BASED ARCHITECTURE FOR FET-BASED, NANOSCALE ELECTRONICS
A DeHon
Emerging Nanoelectronics: Life with and After CMOS 3, 1142, 2005
2005
A first generation DPGA implementation
A Tau
Proc. 3rd Canadian Workshop of field Programmable Devices, 138-143, 1995
3941995
A First Generation DPGA Implementation
I Eslick, D Chen, E Tau, JBE Mirsky, A DeHon
FPD’95–Third Canadian Workshop of Field-Programmable Devices, 1995
11995
A First Generation DPGA Implementation
ETDCIE JeremyBrown, A DeHon
A greedy algorithm for tolerating defective crosspoints in NanoPLA design
H Naeimi, A DeHon
Proceedings. 2004 IEEE International Conference on Field-Programmable …, 2004
1232004
A streaming multi-threaded model
E Caspi, A DeHon, J Wawrzynek
MSP-3, 2001
1622001
A verified information-flow architecture
A Azevedo de Amorim, N Collins, A DeHon, D Demange, C Hriţcu, ...
Proceedings of the 41st ACM SIGPLAN-SIGACT Symposium on Principles of …, 2014
1182014
A Verified Information-Flow Architecture (Long version)
A de Amorim, N Collins, A DeHon, D Demange, C Hriţcu, D Pichardie, ...
crash-safe. org, access, 5-10, 2017
22017
Accelerating SPICE model-evaluation using FPGAs
N Kapre, A DeHon
2009 17th IEEE Symposium on Field Programmable Custom Computing Machines, 37-44, 2009
452009
Accelerating the spice circuit simulator using an fpga: A case study
N Kapre, A DeHon
High-Performance Computing Using FPGAs, 389-427, 2013
32013
Accurate parallel floating-point accumulation
E Kadric, P Gurniak, A DeHon
IEEE Transactions on Computers 65 (11), 3224-3238, 2016
43*2016
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