Practical fault attack on deep neural networks J Breier, X Hou, D Jap, L Ma, S Bhasin, Y Liu Proceedings of the 2018 ACM SIGSAC Conference on Computer and Communications …, 2018 | 139 | 2018 |
SNIFF: reverse engineering of neural networks with fault attacks J Breier, D Jap, X Hou, S Bhasin, Y Liu IEEE Transactions on Reliability, 2021 | 55 | 2021 |
How practical are fault injection attacks, really? J Breier, X Hou IEEE Access 10, 113122-113130, 2022 | 43 | 2022 |
A countermeasure against statistical ineffective fault analysis J Breier, M Khairallah, X Hou, Y Liu IEEE Transactions on Circuits and Systems II: Express Briefs 67 (12), 3322-3326, 2020 | 39 | 2020 |
Fault attacks made easy: differential fault analysis automation on assembly code J Breier, X Hou, Y Liu IACR Transactions on Cryptographic Hardware and Embedded Systems, 96-122, 2018 | 31 | 2018 |
Automated Methods in Cryptographic Fault Analysis J Breier, X Hou, S Bhasin Springer International Publishing, 2019 | 30 | 2019 |
Feeding two cats with one bowl: On designing a fault and side-channel resistant software encoding scheme J Breier, X Hou Topics in Cryptology–CT-RSA 2017: The Cryptographers’ Track at the RSA …, 2017 | 24 | 2017 |
SITM: See-In-The-Middle Side-Channel Assisted Middle Round Differential Cryptanalysis on SPN Block Ciphers S Bhasin, J Breier, X Hou, D Jap, R Poussier, SM Sim IACR Transactions on Cryptographic Hardware and Embedded Systems, 95-122, 2020 | 23 | 2020 |
Back to the Basics: Seamless Integration of Side-Channel Pre-Processing in Deep Neural Networks YS Won, X Hou, D Jap, J Breier, S Bhasin IEEE Transactions on Information Forensics and Security 16, 3215-3227, 2021 | 21 | 2021 |
On Side Channel Vulnerabilities of Bit Permutations in Cryptographic Algorithms J Breier, D Jap, X Hou, S Bhasin IEEE Transactions on Information Forensics and Security 15, 1072-1085, 2019 | 21 | 2019 |
Fully Automated Differential Fault Analysis on Software Implementations of Block Ciphers X Hou, J Breier, F Zhang, Y Liu IACR Transactions on Cryptographic Hardware and Embedded Systems, 1-29, 2019 | 19 | 2019 |
On evaluating fault resilient encoding schemes in software J Breier, X Hou, Y Liu IEEE Transactions on Dependable and Secure Computing 18 (3), 1065-1079, 2019 | 19 | 2019 |
Security Evaluation of Deep Neural Network Resistance Against Laser Fault Injection X Hou, J Breier, D Jap, L Ma, S Bhasin, Y Liu 2020 IEEE International Symposium on the Physical and Failure Analysis of …, 2020 | 18 | 2020 |
On LCD codes and lattices X Hou, F Oggier Information Theory (ISIT), 2016 IEEE International Symposium on, 1501-1505, 2016 | 14 | 2016 |
Hilbert spaces of entire Dirichlet series and composition operators X Hou, B Hu, LH Khoi Journal of Mathematical Analysis and Applications 401 (1), 416-429, 2013 | 13 | 2013 |
Physical security of deep learning on edge devices: Comprehensive evaluation of fault injection attack vectors X Hou, J Breier, D Jap, L Ma, S Bhasin, Y Liu Microelectronics Reliability 120, 114116, 2021 | 12 | 2021 |
FooBaR: Fault Fooling Backdoor Attack on Neural Network Training J Breier, X Hou, M Ochoa, J Solano IEEE Transactions on Dependable and Secure Computing, 2022 | 10 | 2022 |
A Finer-Grain Analysis of the Leakage (Non) Resilience of OCB F Berti, S Bhasin, J Breier, X Hou, R Poussier, FX Standaert, B Udvarhelyi IACR Transactions on Cryptographic Hardware and Embedded Systems, 461-481, 2022 | 8 | 2022 |
Construction and Secrecy Gain of a Family of 5-modular Lattices X Hou, F Lin, F Oggier 2014 IEEE Information Theory Workshop (ITW 2014), 117-121, 2014 | 8 | 2014 |
DNFA: Differential no-fault analysis of bit permutation based ciphers assisted by side-channel X Hou, J Breier, S Bhasin 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE), 182-187, 2021 | 6 | 2021 |