Accuracy-guaranteed bit-width optimization DU Lee, AA Gaffar, RCC Cheung, O Mencer, W Luk, GA Constantinides IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2006 | 271 | 2006 |
A hardware Gaussian noise generator using the Box-Muller method and its error analysis DU Lee, JD Villasenor, W Luk, PHW Leong IEEE transactions on computers 55 (6), 659-671, 2006 | 228 | 2006 |
Energy-efficient image compression for resource-constrained platforms DU Lee, H Kim, M Rahimi, D Estrin, JD Villasenor iEEE Transactions on image Processing 18 (9), 2100-2113, 2009 | 138 | 2009 |
A hardware Gaussian noise generator using the Wallace method DU Lee, W Luk, JD Villasenor, G Zhang, PHW Leong IEEE Transactions on Very Large Scale Integration (VLSI) Systems 13 (8), 911-920, 2005 | 133 | 2005 |
Reconfigurable acceleration for Monte Carlo based financial simulation GL Zhang, PHW Leong, CH Ho, KH Tsoi, CCC Cheung, DU Lee, ... Proceedings. 2005 IEEE International Conference on Field-Programmable …, 2005 | 130 | 2005 |
A Gaussian noise generator for hardware-based simulations DU Lee, W Luk, JD Villasenor, PYK Cheung IEEE Transactions on Computers 53 (12), 1523-1534, 2004 | 127 | 2004 |
Ziggurat-based hardware Gaussian random number generator G Zhang, PHW Leong, DU Lee, JD Villasenor, RCC Cheung, W Luk International Conference on Field Programmable Logic and Applications, 2005 …, 2005 | 106 | 2005 |
Hardware generation of arbitrary random number distributions from uniform distributions via the inversion method RCC Cheung, DU Lee, W Luk, JD Villasenor IEEE transactions on very large scale integration (VLSI) systems 15 (8), 952-962, 2007 | 100 | 2007 |
Hierarchical segmentation schemes for function evaluation DU Lee, W Luk, J Villasenor, PYK Cheung Proceedings. 2003 IEEE International Conference on Field-Programmable …, 2003 | 95 | 2003 |
Optimizing hardware function evaluation DU Lee, AA Gaffar, O Mencer, W Luk IEEE Transactions on Computers 54 (12), 1520-1531, 2005 | 94 | 2005 |
Hardware implementation trade-offs of polynomial approximations and interpolations DU Lee, R Cheung, W Luk, J Villasenor IEEE Transactions on computers 57 (5), 686-701, 2008 | 88 | 2008 |
Minibit: bit-width optimization via affine arithmetic DU Lee, AA Gaffar, O Mencer, W Luk Proceedings of the 42nd annual Design Automation Conference, 837-840, 2005 | 85 | 2005 |
A flexible hardware encoder for low-density parity-check codes DU Lee, W Luk, C Wang, C Jones 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines …, 2004 | 81 | 2004 |
Hierarchical segmentation for hardware function evaluation DU Lee, RCC Cheung, W Luk, JD Villasenor IEEE Transactions on Very Large Scale Integration (VLSI) Systems 17 (1), 103-116, 2008 | 62 | 2008 |
A hardware Gaussian noise generator for channel code evaluation DU Lee, W Luk, J Villasenor, PYK Cheung 11th Annual IEEE Symposium on Field-Programmable Custom Computing Machines …, 2003 | 50 | 2003 |
Non-uniform segmentation for hardware function evaluation DU Lee, W Luk, J Villasenor, PYK Cheung International Conference on Field Programmable Logic and Applications, 796-807, 2003 | 49 | 2003 |
Energy-optimized image communication on resource-constrained sensor platforms DU Lee, H Kim, S Tu, M Rahimi, D Estrin, JD Villasenor Proceedings of the 6th international conference on Information processing in …, 2007 | 42 | 2007 |
A bit-width optimization methodology for polynomial-based function evaluation DU Lee, JD Villasenor IEEE Transactions on Computers 56 (4), 567-571, 2007 | 41 | 2007 |
A flexible architecture for precise gamma correction DU Lee, RCC Cheung, JD Villasenor IEEE Transactions on Very Large Scale Integration (VLSI) Systems 15 (4), 474-478, 2007 | 38 | 2007 |
Inversion-based hardware gaussian random number generator: A case study of function evaluation via hierarchical segmentation DU Lee, RCC Cheung, JD Villasenor, W Luk 2006 IEEE International conference on field programmable technology, 33-40, 2006 | 36 | 2006 |