| 3D Analytical Modeling of Dual Material Triple Gate Silicon-on Nothing MOSFET P Banerjee, SK Sarkar IEEE Transactions on Electron Devices 64, 368-375, 2017 | 33 | 2017 |
| 3-D analytical modeling of high-k gate stack dual-material tri-gate strained silicon-on-nothing MOSFET with dual-material bottom gate for suppressing short channel effects P Banerjee, SK Sarkar Journal of Computational Electronics 16, 631-639, 2017 | 28 | 2017 |
| Threshold Voltage Modeling of Gaussian-doped Dual work function Material Cylindrical Gate-All-Around (CGAA) MOSFET considering the effect of temperature and Fixed Interface … P Banerjee, J Das Microelectronics Journal 120, 1-8, 2022 | 9 | 2022 |
| 3D Modeling based performance analysis of Gate Engineered Trigate SON TFET with SiO2/HfO2 stacked gate oxide P Saha, P Banerjee, SK Sarkar IEEE Conference CONECCT, 2018 | 8 | 2018 |
| Exploring the short channel characteristics of Asymmetric Junctionless Double Gate Silicon On Nothing MOSFET P Saha, P Banerjee, DK Dash, SK Sarkar Journal of Materials Engineering and Performance 27, 2708-2712, 2018 | 8 | 2018 |
| 2D modeling based comprehensive analysis of short channel effects in DMG strained VSTB FET P Saha, P Banerjee, SK Sarkar Superlattices and Microstructures 118, 16-28, 2018 | 8 | 2018 |
| Analytical Modeling of Triple Metal Hetero Dielectric DG SON TFET A Mahajan, DK Dash, P Banerjee, SK Sarkar Journal of Materials Engineering and Performance 27, 2693-2700, 2018 | 7 | 2018 |
| Comprehensive analysis of subthreshold short channel behavior of a Dual-material gate strained Trapezoidal FinFET P Banerjee, SK Sarkar Superlattices and Microstructures 117, 527-537, 2018 | 7 | 2018 |
| Exploring the short channel characteristics and performance analysis of DMDG SON MOSFET P Banerjee, A Sarkar, SK Sarkar Microelectronics Journal 67, 50-56, 2017 | 7 | 2017 |
| Impact of trapped interface charges on short channel characteristics of WFE high-K SOI MOSFET P Saha, P Banerjee, DK Dash, SK Sarkar 3rd international conference “2019 Devices for Integrated Circuit (DevIC …, 2019 | 6 | 2019 |
| Gate Work Function Engineered Trigate MOSFET with a Dual-Material Bottom Gate for Biosensing Applications: A Dielectric Modulation based Approach P Banerjee, J Das Silicon 14, 419-428, 2022 | 5 | 2022 |
| Analysis of short channel characteristics in graded channel dual-material elliptical gate-all-around (GC DM EGAA) MOSFET P Banerjee, SK Sarkar Semiconductor Science and Technology 34, 1-7, 2019 | 5 | 2019 |
| Analytical Modeling and Performance Analysis of Graded Channel Strained Dual-Material Double Gate MOSFET P Banerjee, P Saha, DK Dash, A Ghosh, SK Sarkar 4th International Conference on Computing Communication and Automation 2018 …, 2018 | 5 | 2018 |
| Gate Work Function-Engineered Graded-Channel Macaroni MOSFET: Exploration of Temperature and Localized Trapped Charge- Induced Effects with GIDL Analysis P Banerjee, J Das Journal of Electronic Materials 51, 1512-1523, 2022 | 4 | 2022 |
| Interface Trap Charge Induced Threshold Voltage Modeling of WFE High-K SOI MOSFET P Saha, P Banerjee, DK Dash, SK Sarkar Silicon 12, 2893-2900, 2020 | 4 | 2020 |
| Surface potential based Analytical Modeling of Graded Channel Strained High-k Gate stack Dual-Material Double Gate MOSFET P Banerjee, P Saha, DK Dash, SK Sarkar 3rd international conference “2019 Devices for Integrated Circuit (DevIC …, 2019 | 4 | 2019 |
| Modeling and Analysis of a Front High-k gate stack Dual-Material Tri-gate Schottky Barrier Silicon-on-Insulator MOSFET with a dual-material bottom gate P Banerjee, SK Sarkar Silicon 11, 513-519, 2019 | 4 | 2019 |
| Modeling short channel behavior of proposed Work Function Engineered High-k gate stack DG MOSFET with vertical Gaussian doping P Saha, P Banerjee, DK Dash, SK Sarkar IEEE Electron Device Kolkata Conference [EDKCON 2018], 32-36, 2018 | 4 | 2018 |
| Two dimensional analytical modeling of a high-K gate stack triple-material double gate strained silicon-on-nothing MOSFET with a vertical Gaussian doping P Banerjee, P Saha, SK Sarkar Journal of Computational Electronics 17, 172-180, 2018 | 4 | 2018 |
| Analytical Modelling and Performance Analysis of Gate Engineered Tri-gate SON MOSFET PS Pritha Banerjee, SK Sarkar IET Circuits Devices Syst. 12 (5), 557-562, 2018 | 4 | 2018 |
