| Multi-dimensional rankings, program termination, and complexity bounds of flowchart programs C Alias, A Darte, P Feautrier, L Gonnord Static Analysis: 17th International Symposium, SAS 2010, Perpignan, France …, 2010 | 231 | 2010 |
| Data layout transformation for enhancing data locality on nuca chip multiprocessors Q Lu, C Alias, U Bondhugula, T Henretty, S Krishnamoorthy, ... 2009 18th International Conference on Parallel Architectures and Compilation …, 2009 | 108 | 2009 |
| Bee+ Cl@ k: An implementation of lattice-based array contraction in the source-to-source translator Rose C Alias, F Baray, A Darte ACM SIGPLAN Notices 42 (7), 73-82, 2007 | 53 | 2007 |
| Optimizing remote accesses for offloaded kernels: Application to high-level synthesis for FPGA C Alias, A Darte, A Plesco ACM SIGPLAN Notices 47 (8), 285-286, 2012 | 52 | 2012 |
| Algorithm recognition based on demand-driven dataflow analysis C Alias, D Barthou 10th Working Conference on Reverse Engineering (WCRE 2003), 2003 | 33 | 2003 |
| On the recognition of algorithm templates C Alias, D Barthou Electronic Notes in Theoretical Computer Science 82 (2), 395-409, 2004 | 32 | 2004 |
| Region array SSA S Rus, G He, C Alias, L Rauchwerger Proceedings of the 15th international conference on Parallel architectures …, 2006 | 31 | 2006 |
| FPGA-specific synthesis of loop-nests with pipelined computational cores C Alias, B Pasca, A Plesco Microprocessors and Microsystems 36 (8), 606-619, 2012 | 21 | 2012 |
| Optimizing DDR-SDRAM communications at C-level for automatically-generated hardware accelerators an experience with the Altera C2H HLS tool C Alias, A Darte, A Plesco ASAP 2010-21st IEEE International Conference on Application-specific Systems …, 2010 | 19 | 2010 |
| Mono-parametric tiling is a polyhedral transformation G Iooss, S Rajopadhye, C Alias, Y Zou INRIA Grenoble-Rhône-Alpes; CNRS, 2015 | 15 | 2015 |
| On program equivalence with reductions G Iooss, C Alias, S Rajopadhye International Static Analysis Symposium, 168-183, 2014 | 15 | 2014 |
| Data-aware process networks C Alias, A Plesco Proceedings of the 30th ACM SIGPLAN International Conference on Compiler …, 2021 | 13 | 2021 |
| Automatic generation of FPGA-specific pipelined accelerators C Alias, B Pasca, A Plesco International Symposium on Applied Reconfigurable Computing, 53-66, 2011 | 11 | 2011 |
| Deciding where to call performance libraries C Alias, D Barthou Euro-Par 2005 Parallel Processing: 11th International Euro-Par Conference …, 2005 | 9 | 2005 |
| Monoparametric tiling of polyhedral programs G Iooss, C Alias, S Rajopadhye International Journal of Parallel Programming 49, 376-409, 2021 | 7 | 2021 |
| Rank: A Tool to Check Program Termination and Computational Complexity. C Alias, A Darte, P Feautrier, L Gonnord ICST Workshops, 238, 2013 | 7 | 2013 |
| On domain-specific languages reengineering C Alias, D Barthou Generative Programming and Component Engineering: 4th International …, 2005 | 7 | 2005 |
| Estimation of parallel complexity with rewriting techniques C Alias, C Fuhs, L Gonnord Workshop on Termination, 2016 | 6 | 2016 |
| Kernel offloading with optimized remote accesses C Alias, A Darte, A Plesco INRIA, 2011 | 6 | 2011 |
| Optimizing affine control with semantic factorizations C Alias, A Plesco ACM Transactions on Architecture and Code Optimization (TACO) 14 (4), 1-22, 2017 | 5 | 2017 |
