| A simulation study of nbti impact on 14-nm node finfet technology for logic applications: Device degradation to circuit-level interaction S Mishra, H Amrouch, J Joe, CK Dabhi, K Thakor, YS Chauhan, J Henkel, ... IEEE Transactions on Electron Devices 66 (1), 271-278, 2018 | 59 | 2018 |
| A 3-D TCAD framework for NBTI—Part I: Implementation details and FinFET channel material impact R Tiwari, N Parihar, K Thakor, HY Wong, S Motzny, M Choi, V Moroz, ... IEEE Transactions on Electron Devices 66 (5), 2086-2092, 2019 | 49 | 2019 |
| A 3-D TCAD framework for NBTI, Part-II: Impact of mechanical strain, quantum effects, and FinFET dimension scaling R Tiwari, N Parihar, K Thakor, HY Wong, S Motzny, M Choi, V Moroz, ... IEEE Transactions on Electron Devices 66 (5), 2093-2099, 2019 | 32 | 2019 |
| TCAD Framework for HCD Kinetics in Low VD Devices Spanning Full VG/VD Space U Sharma, M Duan, H Diwakar, K Thakor, HY Wong, S Motzny, D Dolgos, ... IEEE Transactions on Electron Devices 67 (11), 4749-4756, 2020 | 14 | 2020 |
| Modeling of classical channel hot electron degradation in n-MOSFETs using TCAD H Diwakar, K Thakor, S Mahapatra IEEE Transactions on Electron Devices 69 (7), 3596-3603, 2022 | 7 | 2022 |
| TCAD framework to estimate the NBTI degradation in FinFET and GAA NSFET under mechanical strain R Tiwari, N Parihar, K Thakor, HY Wong, S Mahapatra 2019 International Conference on Simulation of Semiconductor Processes and …, 2019 | 5 | 2019 |
| Design of a 16-bit RISC Processor Using VHDL KP Thakor, A Pal, M Shirodkar IJERT 6 (04), 238-244, 2017 | 5 | 2017 |
| Design of a 16-bit RISC Processor Using VHDL KP Thakor, A Pal | 5* | |
| Modeling Time and Bias Dependence of Classical HCD Mechanism (Peak ISUB Stress) in n-MOSFETs H Diwakar, K Thakor, S Mahapatra 2022 IEEE International Reliability Physics Symposium (IRPS), P55-1-P55-6, 2022 | 4 | 2022 |
| A Device to Circuit Framework for NBTI P Chatterjee, K Thakor, AS Bisht, A Ansari, S Samaga, S Mahapatra 2023 IEEE International Integrated Reliability Workshop (IIRW), 1-6, 2023 | 2 | 2023 |
| A Generic Framework for MOSFET Reliability—Part II: Gate and Drain Stress—HCD S Mahapatra, H Diwakar, K Thakor, N Choudhury, P Chatterjee, S Kumar, ... IEEE Transactions on Electron Devices, 2023 | 2 | 2023 |
| A Theoretical Framework for Trap Generation and Passivation in NAND Flash Tunnel Oxide During Distributed Cycling and Retention Bake T Samadder, S Kumar, K Thakor, S Mahapatra 2021 IEEE International Reliability Physics Symposium (IRPS), 1-6, 2021 | 2 | 2021 |
| Stochastic and deterministic modeling frameworks for time kinetics of gate insulator traps during and after hot carrier stress in MOSFETs S Kumar, T Samadder, K Thakor, U Sharma, S Mahapatra 2021 IEEE International Reliability Physics Symposium (IRPS), 1-5, 2021 | 2 | 2021 |
| Modeling of channel hot electron degradation in n-MOSFETs K Thakor, H Diwakar, S Mahapatra 2022 IEEE 16th International Conference on Solid-State & Integrated Circuit …, 2022 | 1 | 2022 |
| A TCAD to SPICE Framework for Isolation of BTI and HCD in GAA-SNS FETs and to Estimate Impact on RO Under Normal and Overclocking Conditions K Thakor, P Chatterjee, S Mahapatra 2024 IEEE International Reliability Physics Symposium (IRPS), 1-6, 2024 | | 2024 |
| A Device to Circuit Reliability Framework for BTI and HCD Aging P Chatterjee, KS Thakor, S Mahapatra 2024 8th IEEE Electron Devices Technology & Manufacturing Conference (EDTM), 1-3, 2024 | | 2024 |
| Design and Optimization of Dielectric DBR for VCSEL, Targeting Emission Range of 520-550 nm R Kumar, K Thakor, S Gupta, R Maripeddi, D Nag, A Laha | | |
Souvik MahapatraProfessor, EE Dept, IIT Bombay (Fellow of IEEE, INSA, IASc, INAE)在 ee.iitb.ac.in 的电子邮件经过验证
