Architecting phase change memory as a scalable DRAM alternative BC Lee, E Ipek, O Mutlu, D Burger ISCA -- Proc. Int'l Symp. Computer Architecture, 2-13, 2009 | 1875 | 2009 |
Better I/O through byte-addressable, persistent memory J Condit, E Nightingale, C Frost, E Ipek, B Lee, D Burger, D Coetzee SOSP -- Proc. Symp. Operating System Principles, 133-146, 2009 | 1225 | 2009 |
Understanding sources of inefficiency in general-purpose chips R Hameed, W Qadeer, M Wachs, O Azizi, A Solomatnikov, BC Lee, ... ISCA -- Proc. Int'l Symp. Computer Architecture, 37-47, 2010 | 734 | 2010 |
Accurate and efficient regression modeling for microarchitectural performance and power prediction BC Lee, DM Brooks ASPLOS -- Proc. Int'l Conf. Architectural Support for Programming Languages …, 2006 | 666 | 2006 |
Phase-change technology and the future of main memory BC Lee, P Zhou, J Yang, Y Zhang, B Zhao, E Ipek, O Mutlu, D Burger IEEE Micro 30 (1), 143-143, 2010 | 583 | 2010 |
Sustainable ai: Environmental implications, challenges and opportunities CJ Wu, R Raghavendra, U Gupta, B Acun, N Ardalani, K Maeng, G Chang, ... Proceedings of Machine Learning and Systems 4, 795-813, 2022 | 354 | 2022 |
Towards energy-proportional datacenter memory with mobile DRAM KT Malladi, BC Lee, FA Nothaft, C Kozyrakis, K Periyathambi, M Horowitz ISCA -- Proc. Int'l Symp. Computer Architecture, 37-48, 2012 | 350 | 2012 |
Web search using mobile cores: Quantifying and mitigating the price of efficiency V Janapa Reddi, BC Lee, T Chilimbi, K Vaid ISCA -- Proc. Int'l Symp. Computer Architecture, 314-325, 2010 | 295* | 2010 |
Methods of inference and learning for performance modeling of parallel applications BC Lee, DM Brooks, BR de Supinski, M Schulz, K Singh, SA McKee PPoPP -- Proc. Symp. Principles and Practice of Parallel Programming, 249-258, 2007 | 281 | 2007 |
Performance optimizations and bounds for sparse matrix-vector multiply R Vuduc, JW Demmel, KA Yelick, S Kamil, R Nishtala, B Lee SC -- Proc. Supercomputing, 26-26, 2002 | 203 | 2002 |
CMP design space exploration subject to physical constraints Y Li, B Lee, D Brooks, Z Hu, K Skadron HPCA -- Int'l Conf. High Performance Computer Architecture, 17-28, 2006 | 197 | 2006 |
Energy-performance tradeoffs in processor architecture and circuit design: A marginal cost analysis O Azizi, A Mahesri, BC Lee, SJ Patel, M Horowitz ISCA -- Proc. Int'l Symp. Computer Architecture, 26-36, 2010 | 196 | 2010 |
Phase change memory architecture and the quest for scalability BC Lee, E Ipek, O Mutlu, D Burger Communications of the ACM 53 (7), 99-106, 2010 | 176 | 2010 |
Illustrative design space studies with microarchitectural regression models BC Lee, DM Brooks HPCA -- Int'l Symp. High Performance Computer Architecture, 340-351, 2007 | 171 | 2007 |
Rethinking digital design: Why design must change O Shacham, O Azizi, M Wachs, W Qadeer, Z Asgar, K Kelley, ... IEEE Micro 30 (6), 9-24, 2010 | 143 | 2010 |
REF: Resource Elasticity Fairness with Sharing Incentives for Multiprocessors SM Zahedi, BC Lee ASPLOS -- Proc. 19th International Conference on Architectural Support for …, 2014 | 133* | 2014 |
Navigating heterogeneous processors with market mechanisms M Guevara, B Lubin, BC Lee HPCA -- Proc. Int'l Symp. High-Performance Computer Architecture, 95-106, 2013 | 122* | 2013 |
CPR: Composable performance regression for scalable multiprocessor models BC Lee, J Collins, H Wang, D Brooks MICRO -- Proc. Int'l Symp. Microarchitecture, 270-281, 2008 | 115 | 2008 |
Disintegrated control for energy-efficient and heterogeneous memory systems TJ Ham, BK Chelepalli, N Xue, BC Lee HPCA -- Proc. Int'l Symp. High-Performance Computer Architecture, 424-435, 2013 | 95 | 2013 |
Rethinking DRAM power modes for energy proportionality KT Malladi, I Shaeffer, L Gopalakrishnan, D Lo, BC Lee, M Horowitz MICRO -- Proc. Int'l Symp. Microarchitecture, 131-142, 2012 | 89 | 2012 |