Plasma processing of low-k dielectrics MR Baklanov, JF de Marneffe, D Shamiryan, AM Urbanowicz, H Shi, ... Journal of Applied Physics 113 (4), 2013 | 362 | 2013 |
Multilayer MoS 2 growth by metal and metal oxide sulfurization MH Heyne, D Chiappe, J Meersschaut, T Nuytten, T Conard, H Bender, ... Journal of Materials Chemistry C 4 (6), 1295-1304, 2016 | 73 | 2016 |
Performance improvement of tall triple gate devices with strained SiN layers N Collaert, A De Keersgieter, KG Anil, R Rooyackers, G Eneman, ... IEEE electron device letters 26 (11), 820-822, 2005 | 66 | 2005 |
Wafer-scale integration of double gated WS2-transistors in 300mm Si CMOS fab I Asselberghs, Q Smets, T Schram, B Groven, D Verreck, A Afzalian, ... 2020 IEEE International Electron Devices Meeting (IEDM), 40.2. 1-40.2. 4, 2020 | 51 | 2020 |
Defect-induced bandgap narrowing in low-k dielectrics X Guo, H Zheng, SW King, VV Afanas' ev, MR Baklanov, JF de Marneffe, ... Applied Physics Letters 107 (8), 2015 | 50 | 2015 |
Demonstration of fully Ni-silicided metal gates on HfO/sub 2/based high-k gate dielectrics as a candidate for low power applications KG Anil, A Veloso, S Kubicek, T Schram, E Augendre, JF de Marneffe, ... Digest of Technical Papers. 2004 Symposium on VLSI Technology, 2004., 190-191, 2004 | 49 | 2004 |
Reactive plasma cleaning and restoration of transition metal dichalcogenide monolayers D Marinov, JF de Marneffe, Q Smets, G Arutchelvan, KM Bal, E Voronina, ... npj 2D Materials and Applications 5 (1), 17, 2021 | 45 | 2021 |
Low damage cryogenic etching of porous organosilicate low-k materials using SF6/O2/SiF4 L Zhang, R Ljazouli, P Lefaucheux, T Tillocher, R Dussart, ... ECS Journal of Solid State Science and Technology 2 (6), N131, 2013 | 43 | 2013 |
Damage free cryogenic etching of a porous organosilica ultralow-k film L Zhang, R Ljazouli, P Lefaucheux, T Tillocher, R Dussart, ... ECS Solid State Letters 2 (2), N5, 2012 | 43 | 2012 |
CMOS integration of dual work function phase controlled Ni FUSI with simultaneous silicidation of NMOS (NiSi) and PMOS (Ni-rich silicide) gates on HfSiON A Lauwers, A Veloso, T Hoffmann, MJH Van Dal, C Vrancken, S Brus, ... IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest., 4 …, 2005 | 42 | 2005 |
On the scalability of source/drain current enhancement in thin film sSOI E Augendre, G Eneman, A De Keersgieter, V Simons, I De Wolf, J Ramos, ... Proceedings of 35th European Solid-State Device Research Conference, 2005 …, 2005 | 40 | 2005 |
Deviations from plastic barriers in thin films YZ Zhang, Z Wang, XF Lu, HH Wen, JF De Marneffe, R Deltour, ... Physical Review B—Condensed Matter and Materials Physics 71 (5), 052502, 2005 | 38 | 2005 |
Damage free integration of ultralow-k dielectrics by template replacement approach L Zhang, JF De Marneffe, N Heylen, G Murdoch, Z Tokei, J Boemmels, ... Applied Physics Letters 107 (9), 2015 | 36 | 2015 |
Effect of UV irradiation on modification and subsequent wet removal of model and post-etch fluorocarbon residues QT Le, JF De Marneffe, T Conard, I Vaesen, H Struyf, G Vereecke Journal of The Electrochemical Society 159 (3), H208, 2011 | 33 | 2011 |
Improved plasma resistance for porous low-k dielectrics by pore stuffing approach L Zhang, JF de Marneffe, MH Heyne, S Naumov, Y Sun, A Zotovich, ... ECS Journal of Solid State Science and Technology 4 (1), N3098, 2014 | 32 | 2014 |
Study of novel EUVL mask absorber candidates M Wu, D Thakare, JF De Marneffe, P Jaenen, L Souriau, K Opsomer, ... Journal of Micro/Nanopatterning, Materials, and Metrology 20 (2), 021002-021002, 2021 | 31 | 2021 |
A 0.314/spl mu/m/sup 2/6T-SRAM cell build with tall triple-gate devices for 45nm applications using 0.75 NA 193nm lithography A Nackaerts, M Ercken, S Demuynck, A Lauwers, C Baerts, H Bender, ... IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004 …, 2004 | 29 | 2004 |
Molecular glass resists for scanning probe lithography C Neuber, A Ringk, T Kolb, F Wieberger, P Strohriegl, HW Schmidt, ... Alternative Lithographic Technologies VI 9049, 375-383, 2014 | 28 | 2014 |
Imaging performance of the EUV alpha semo tool at IMEC GF Lorusso, J Hermans, AM Goethals, B Baudemprez, F Van Roey, ... Emerging Lithographic Technologies XII 6921, 202-211, 2008 | 28 | 2008 |
Diffusion-less junctions and super halo profiles for PMOS transistors formed by SPER and FUSI gate in 45 nm physical gate length devices S Severi, KG Anil, K Henson, A Lauwers, A Veloso, JF de Marneffe, ... IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004 …, 2004 | 27 | 2004 |