| Investigating the impact of logic and circuit implementation on full adder performance S Purohit, M Margala IEEE Transactions on Very Large Scale Integration (VLSI) Systems 20 (7 …, 2011 | 85 | 2011 |
| MORA-an architecture and programming model for a resource efficient coarse grained reconfigurable processor SR Chalamalasetti, S Purohit, M Margala, W Vanderbauwhede 2009 NASA/ESA Conference on Adaptive Hardware and Systems, 389-396, 2009 | 47 | 2009 |
| A low cost reconfigurable soft processor for multimedia applications: Design synthesis and programming model SR Chalamalasetti, W Vanderbauwhede, S Purohit, M Margala 2009 International Conference on Field Programmable Logic and Applications …, 2009 | 20 | 2009 |
| Design and evaluation of high-performance processing elements for reconfigurable systems SS Purohit, SR Chalamalasetti, M Margala, WA Vanderbauwhede IEEE transactions on very large scale integration (VLSI) systems 21 (10 …, 2012 | 16 | 2012 |
| New performance/power/area efficient, reliable full adder design S Purohit, M Margala, M Lanuzza, P Corsonello Proceedings of the 19th ACM Great Lakes symposium on VLSI, 493-498, 2009 | 16 | 2009 |
| Exploring digital logic design using ballistic deflection transistors through Monte Carlo simulations I Íñiguez-de-La-Torre, S Purohit, V Kaushal, M Margala, M Gong, ... IEEE Transactions on Nanotechnology 10 (6), 1337-1346, 2011 | 14 | 2011 |
| Design-space exploration of energy-delay-area efficient coarse-grain reconfigurable datapath S Purohit, M Lanuzza, S Perri, P Corsonello, M Margala 2009 22nd International Conference on VLSI Design, 45-50, 2009 | 14 | 2009 |
| Power-efficient high throughput reconfigurable datapath design for portable multimedia devices S Purohit, SR Chalamalasetti, M Margala, P Corsonello 2008 International Conference on Reconfigurable Computing and FPGAs, 217-222, 2008 | 14 | 2008 |
| A C++-embedded Domain-Specific Language for programming the MORA soft processor array W Vanderbauwhede, M Margala, SR Chalamalasetti, S Purohit ASAP 2010-21st IEEE International Conference on Application-specific Systems …, 2010 | 13 | 2010 |
| Design and evaluation of an energy-delay-area efficient datapath for coarse-grain reconfigurable computing systems S Purohit, M Lanuzza, S Perri, P Corsonello, M Margala Journal of Low Power Electronics 5 (3), 326-338, 2009 | 13 | 2009 |
| Throughput/resource-efficient reconfigurable processor for multimedia applications S Purohit, SR Chalamalasetti, M Margala, W Vanderbauwhede IEEE transactions on very large scale integration (VLSI) systems 21 (7 …, 2012 | 12 | 2012 |
| Programming Model and Low-level Language for a Coarse-Grained Reconfigurable Multimedia Processor. W Vanderbauwhede, M Margala, SR Chalamalasetti, S Purohit ERSA, 195-201, 2009 | 12 | 2009 |
| A few lines of code, thousands of cores: High-level FPGA programming using vector processor networks W Vanderbauwhede, SR Chalamalasetti, S Purohit, M Margala 2011 International Conference on High Performance Computing & Simulation …, 2011 | 11 | 2011 |
| Design space exploration of split-path data driven dynamic full adder S Purohit, M Lanuzza, M Margala Journal of Low Power Electronics 6 (4), 469-481, 2010 | 11 | 2010 |
| Practical consensus recommendations on management of HR+ ve early breast cancer with specific reference to genomic profiling A Aggarwal, A Vaid, A Ramesh, PM Parikh, S Purohit, B Avasthi, S Gupta, ... South Asian Journal of Cancer 7 (02), 096-101, 2018 | 9 | 2018 |
| Performance and area efficient transpose memory architecture for high throughput adaptive signal processing systems M El-Hadedy, S Purohit, M Margala, SJ Knapskog 2010 NASA/ESA Conference on Adaptive Hardware and Systems, 113-120, 2010 | 6 | 2010 |
| Low overhead soft error detection and correction scheme for reconfigurable pipelined data paths S Purohit, SR Chalamalasetti, M Margala 2010 NASA/ESA Conference on Adaptive Hardware and Systems, 59-65, 2010 | 5 | 2010 |
| An area efficient design methodology for SEU tolerant digital circuits S Purohit, D Harrington, M Margala Proceedings of 2010 IEEE International Symposium on Circuits and Systems …, 2010 | 5 | 2010 |
| Data driven DCVSL: A clockless approach to dynamic differential circuit design S Purohit, M Margala 2010 53rd IEEE International Midwest Symposium on Circuits and Systems, 640-643, 2010 | 4 | 2010 |
| Radiation-Hardened Reconfigurable Array With Instruction Roll-Back SR Chalamalasetti, S Purohit, M Margala, W Vanderbauwhede IEEE Embedded Systems Letters 2 (4), 123-126, 2010 | 3 | 2010 |
