| Non-volatile semiconductor memory device H Uchikawa, T Ishikawa, M Honma US Patent 8,136,014, 2012 | 202 | 2012 |
| Memory system and control method for the same K Sakurada, H Uchikawa US Patent 8,250,437, 2012 | 173 | 2012 |
| Binary linear locally repairable codes P Huang, E Yaakobi, H Uchikawa, PH Siegel IEEE Transactions on Information Theory 62 (11), 6268-6283, 2016 | 98 | 2016 |
| Semiconductor memory device and method of controlling the same S Kanno, H Uchikawa US Patent 8,117,517, 2012 | 95 | 2012 |
| Semiconductor memory device and decoding method K Sakurada, H Uchikawa US Patent 8,385,117, 2013 | 65 | 2013 |
| Error analysis and inter-cell interference mitigation in multi-level cell flash memories V Taranalli, H Uchikawa, PH Siegel 2015 IEEE International Conference on Communications (ICC), 271-276, 2015 | 56 | 2015 |
| Linear locally repairable codes with availability P Huang, E Yaakobi, H Uchikawa, PH Siegel 2015 IEEE International Symposium on Information Theory (ISIT), 1871-1875, 2015 | 55 | 2015 |
| Global error recovery system D Hashimoto, H Uchikawa US Patent 9,946,596, 2018 | 53 | 2018 |
| Channel models for multi-level cell flash memories based on empirical error analysis V Taranalli, H Uchikawa, PH Siegel IEEE Transactions on Communications 64 (8), 3169-3181, 2016 | 46 | 2016 |
| Non-volatile semiconductor storage device and non-volatile storage system T Ishikawa, M Honma, H Uchikawa US Patent 8,032,810, 2011 | 46 | 2011 |
| Non-volatile semiconductor storage system M Honma, N Shibata, H Uchikawa US Patent 7,508,704, 2009 | 46 | 2009 |
| Global error recovery system D Hashimoto, H Uchikawa US Patent 10,146,482, 2018 | 44 | 2018 |
| Design of non-precoded protograph-based LDPC codes H Uchikawa 2014 IEEE International Symposium on Information Theory, 2779-2783, 2014 | 43 | 2014 |
| Cyclic linear binary locally repairable codes P Huang, E Yaakobi, H Uchikawa, PH Siegel 2015 IEEE information theory workshop (ITW), 1-5, 2015 | 41 | 2015 |
| Wireless communication apparatus D Takeda, Y Egashira, T Aoki, Y Tanabe, K Harada, H Uchikawa US Patent 7,532,681, 2009 | 35 | 2009 |
| Controller and non-volatile semiconductor memory device H Uchikawa, K Sakurada US Patent 8,149,623, 2012 | 34 | 2012 |
| Nonvolatile semiconductor memory system having first and second error correction units H Uchikawa, Y Kondo US Patent 8,572,465, 2013 | 27 | 2013 |
| Spatially coupled protograph-based LDPC codes for decode-and-forward in erasure relay channel H Uchikawa, K Kasai, K Sakaniwa IEICE Transactions on Fundamentals of Electronics, Communications and …, 2011 | 24 | 2011 |
| Fault-tolerant quantum computation with a soft-decision decoder for error correction and detection by teleportation H Goto, H Uchikawa Scientific reports 3 (1), 2044, 2013 | 22 | 2013 |
| Error detection/correction circuit, memory controller and semiconductor memory apparatus K Sakaue, T Ishikawa, Y Ishikawa, K Ichikawa, H Uchikawa US Patent 8,453,034, 2013 | 22 | 2013 |
Eitan YaakobiAssociate Professor at Technion在 cs.technion.ac.il 的电子邮件经过验证
