| FireSim: FPGA-accelerated cycle-exact scale-out system simulation in the public cloud S Karandikar, H Mao, D Kim, D Biancolin, A Amid, D Lee, N Pemberton, ... 2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture …, 2018 | 297 | 2018 |
| Hawq-v3: Dyadic neural network quantization Z Yao, Z Dong, Z Zheng, A Gholami, J Yu, E Tan, L Wang, Q Huang, ... International Conference on Machine Learning, 11875-11886, 2021 | 226 | 2021 |
| Autockt: Deep reinforcement learning of analog circuit designs K Settaluri, A Haj-Ali, Q Huang, K Hakhamaneshi, B Nikolic 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 490-495, 2020 | 137 | 2020 |
| Synetgy: Algorithm-hardware co-design for convnet accelerators on embedded fpgas Y Yang, Q Huang, B Wu, T Zhang, L Ma, G Gambardella, M Blott, ... Proceedings of the 2019 ACM/SIGDA international symposium on field …, 2019 | 136 | 2019 |
| Cosa: Scheduling by constrained optimization for spatial accelerators Q Huang, M Kang, G Dinh, T Norell, A Kalaiah, J Demmel, J Wawrzynek, ... 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture …, 2021 | 100 | 2021 |
| Autophase: Juggling hls phase orderings in random forests with deep reinforcement learning Q Huang, A Haj-Ali, W Moses, J Xiang, I Stoica, K Asanovic, J Wawrzynek arXiv preprint arXiv:2003.00671, 2020 | 84* | 2020 |
| From software to accelerators with LegUp high-level synthesis A Canis, J Choi, B Fort, R Lian, Q Huang, N Calagar, M Gort, JJ Qin, ... 2013 International Conference on Compilers, Architecture and Synthesis for …, 2013 | 82 | 2013 |
| The effect of compiler optimizations on high-level synthesis for FPGAs Q Huang, R Lian, A Canis, J Choi, R Xi, S Brown, J Anderson 2013 IEEE 21st Annual International Symposium on Field-Programmable Custom …, 2013 | 75 | 2013 |
| Integrating NVIDIA deep learning accelerator (NVDLA) with RISC-V SoC on FireSim F Farshchi, Q Huang, H Yun 2019 2nd Workshop on Energy Efficient Machine Learning and Cognitive …, 2019 | 65 | 2019 |
| Codenet: Efficient deployment of input-adaptive object detection on embedded fpgas Q Huang, D Wang, Z Dong, Y Gao, Y Cai, T Li, B Wu, K Keutzer, ... The 2021 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays …, 2021 | 58* | 2021 |
| The effect of compiler optimizations on high-level synthesis-generated hardware Q Huang, R Lian, A Canis, J Choi, R Xi, N Calagar, S Brown, J Anderson ACM Transactions on Reconfigurable Technology and Systems (TRETS) 8 (3), 1-26, 2015 | 52 | 2015 |
| Full stack optimization of transformer inference: a survey S Kim, C Hooper, T Wattanawong, M Kang, R Yan, H Genc, G Dinh, ... arXiv preprint arXiv:2302.14017, 2023 | 47 | 2023 |
| FPGA accelerated INDEL realignment in the cloud L Wu, D Bruns-Smith, FA Nothaft, Q Huang, S Karandikar, J Le, A Lin, ... 2019 IEEE International Symposium on High Performance Computer Architecture …, 2019 | 44 | 2019 |
| Hao: Hardware-aware neural architecture optimization for efficient inference Z Dong, Y Gao, Q Huang, J Wawrzynek, HKH So, K Keutzer 2021 IEEE 29th Annual International Symposium on Field-Programmable Custom …, 2021 | 43 | 2021 |
| Bru: Bandwidth regulation unit for real-time multicore processors F Farshchi, Q Huang, H Yun 2020 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS …, 2020 | 31 | 2020 |
| Centrifuge: Evaluating full-system HLS-generated heterogeneous-accelerator SoCs using FPGA-Acceleration Q Huang, C Yarp, S Karandikar, N Pemberton, B Brock, L Ma, G Dai, ... | 20 | 2019 |
| Protuner: tuning programs with monte carlo tree search A Haj-Ali, H Genc, Q Huang, W Moses, J Wawrzynek, K Asanović, I Stoica arXiv preprint arXiv:2005.13685, 2020 | 17 | 2020 |
| Learning a continuous and reconstructible latent space for hardware accelerator design Q Huang, C Hong, J Wawrzynek, M Subedar, YS Shao 2022 IEEE International Symposium on Performance Analysis of Systems and …, 2022 | 16 | 2022 |
| Dosa: Differentiable model-based one-loop search for dnn accelerators C Hong, Q Huang, G Dinh, M Subedar, YS Shao Proceedings of the 56th Annual IEEE/ACM International Symposium on …, 2023 | 7 | 2023 |
| AutoPhase: Compiler Phase-Ordering for HLS with Deep Reinforcement Learning A Haj-Ali, Q Huang, W Moses, J Xiang, I Stoica, K Asanovic, J Wawrzynek Technical Report. http://arxiv. org/abs, 1901 | 3 | 1901 |
John WAWRZYNEKProfessor of EECS, University of California, Berkeley在 berkeley.edu 的电子邮件经过验证
