An FPGA implementation of a long short-term memory neural network JC Ferreira, J Fonseca 2016 International Conference on ReConFigurable Computing and FPGAs …, 2016 | 73 | 2016 |
Parallel implementation on FPGA of support vector machines using stochastic gradient descent FF Lopes, JC Ferreira, MAC Fernandes Electronics 8 (6), 631, 2019 | 40 | 2019 |
Support for partial run-time reconfiguration of platform FPGAs ML Silva, JC Ferreira Journal of Systems Architecture 52 (12), 709-726, 2006 | 36 | 2006 |
Control and observation of analog nodes in mixed-signal boards JS Matos, AC Leao, JC Ferreira Proceedings of IEEE International Test Conference-(ITC), 323-331, 1993 | 36 | 1993 |
Tool to support computer architecture teaching and learning B Nova, JC Ferreira, A Araújo 2013 1st International Conference of the Portuguese Society for Engineering …, 2013 | 31 | 2013 |
A routing protocol for WSN based on the implemention of source routing for minumum cost forwarding method F Derogarian, JC Ferreira, VMG Tavares Proc. 5th Intl. Conf. on Sensor Tech. Appl.(SENSORCOMM 2011), 85-90, 2010 | 31 | 2010 |
Transparent trace-based binary acceleration for reconfigurable HW/SW systems J Bispo, N Paulino, JMP Cardoso, JC Ferreira IEEE Transactions on Industrial Informatics 9 (3), 1625-1634, 2012 | 22 | 2012 |
Generation of partial FPGA configurations at run-time ML Silva, JC Ferreira 2008 International Conference on Field Programmable Logic and Applications …, 2008 | 22 | 2008 |
Parallel implementation of k-means algorithm on fpga LA Dias, JC Ferreira, MAC Fernandes IEEE Access 8, 41071-41084, 2020 | 21 | 2020 |
Evaluation of CGRA architecture for real-time processing of biological signals on wearable devices J Lopes, D Sousa, JC Ferreira 2017 International Conference on ReConFigurable Computing and FPGAs …, 2017 | 21 | 2017 |
Generation of customized accelerators for loop pipelining of binary instruction traces NMC Paulino, JC Ferreira, JMP Cardoso IEEE Transactions on Very Large Scale Integration (VLSI) Systems 25 (1), 21-34, 2016 | 20 | 2016 |
A wearable sensor network for human locomotion data capture A Zambrano, F Derogarian, R Dias, MJ Abreu, A Catarino, AM Rocha, ... pHealth 2012, 216-223, 2012 | 20 | 2012 |
REFLECT: rendering FPGAs to multi-core embedded computing JMP Cardoso, PC Diniz, Z Petrov, K Bertels, M Hübner, H van Someren, ... Reconfigurable Computing: From FPGAs to Hardware/Software Codesign, 261-289, 2011 | 19 | 2011 |
Creation of partial FPGA configurations at run-time ML Silva, JC Ferreira 2010 13th Euromicro conference on digital system design: Architectures …, 2010 | 19 | 2010 |
Run-time reconfiguration support for FPGAs with embedded CPUs: The hardware layer JC Ferreira, MM Silva 19th IEEE International Parallel and Distributed Processing Symposium, 4 pp., 2005 | 19 | 2005 |
Improving performance and energy consumption in embedded systems via binary acceleration: A survey N Paulino, JC Ferreira, JMP Cardoso ACM Computing Surveys (CSUR) 53 (1), 1-36, 2020 | 18 | 2020 |
A scalable array for cellular genetic algorithms: TSP as case study PV dos Santos, JC Alves, JC Ferreira 2012 International Conference on Reconfigurable Computing and FPGAs, 1-6, 2012 | 18 | 2012 |
FPGA-based rectification of stereo images JGP Rodrigues, JC Ferreira 2010 Conference on Design and Architectures for Signal and Image Processing …, 2010 | 18 | 2010 |
Dynamically reconfigurable LTE-compliant OFDM modulator for downlink transmission ML Ferreira, A Barahimi, JC Ferreira 2016 Conference on Design of Circuits and Integrated Systems (DCIS), 1-6, 2016 | 16 | 2016 |
Transparent Runtime Migration of Loop‐Based Traces of Processor Instructions to Reconfigurable Processing Units J Bispo, N Paulino, JMP Cardoso, JC Ferreira International Journal of Reconfigurable Computing 2013 (1), 340316, 2013 | 16 | 2013 |