| Leakage power characterization at high temperatures for an integrated circuit DBC Vidyapoornachary, A Haridass, A Joseph, CR Lefurgy, ... US Patent 10,031,180, 2018 | 4 | 2018 |
| Hierarchical power analysis using improved activity abstraction and capacitance abstraction by accounting for design heterogeneity extremities A Joseph, SV Rachamalla, R Rao, S Reddy US Patent 11,036,905, 2021 | 3 | 2021 |
| Virtual logic netlist: Enabling efficient RTL analysis S Rachamalla, A Joseph, R Rao, D Pandey Sixteenth International Symposium on Quality Electronic Design, 571-576, 2015 | 3 | 2015 |
| Heterogeneity aware power abstractions for dynamic power dominated FinFET‐based microprocessors S Rachamalla, S Reddy, A Joseph IET Computers & Digital Techniques 13 (6), 524-531, 2019 | 2 | 2019 |
| FirmLeak: A framework for efficient and accurate runtime estimation of leakage power by firmware A Joseph, A Haridass, C Lefurgy, S Rachamalla, S Pai, D Chinnakkonda, ... 2015 28th International Conference on VLSI Design, 464-469, 2015 | 2 | 2015 |
| Heterogeneity aware power abstraction for hierarchical power analysis A Joseph, S Rachamalla, S Reddy, N Dhanwada 2019 32nd International Conference on VLSI Design and 2019 18th …, 2019 | 1 | 2019 |
| FVCAG: A framework for formal verification driven power modeling and verification A Joseph, S Rachamalla, RM Rao, A Haridass, PK Nalla Proceedings of the 2016 International Symposium on Low Power Electronics and …, 2016 | 1 | 2016 |
| Methods and systems for identifying flaws and bugs in integrated circuits, for example, microprocessors A Joseph, W Roesner, V Paruthi, S Ghosh, SV Rachamalla US Patent 11,733,295, 2023 | | 2023 |
| LabReplay: Efficient Replay of Post-Silicon Debug for High Performance Microprocessor Designs DAC, 2021 | | 2021 |
| Method for efficient localized self-heating analysis using location based DeltaT analysis NR Dhanwada, A Joseph, A Madhusoodanan, SV Rachamalla US Patent 10,572,614, 2020 | | 2020 |
| Efficiently Capturing Heterogeneity in Self Heating Analysis of Next Generation High-performance Microprocessor Designs DAC 2018, 2018 | | 2018 |
| Techniques for Efficient RTL Clock and Memory Gating Takedown of Next Generation Microprocessor Designs DAC 2017, 2017 | | 2017 |
| Efficient Techniques for Per Clock Gating Domain Contributor based Power Abstraction of IP Blocks for Hierarchical Power Analysis DAC 2016, 2016 | | 2016 |
| Experimental Characterization of Workload-induced Logic States on Chip Leakage Power of a Server Class Microprocessor DAC 2016, 2016 | | 2016 |
| FreqLeak: A frequency step based method for efficient leakage power characterization in a system A Joseph, A Haridass, C Lefurgy, S Pai, S Rachamalla, F Campisano 2015 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2015 | | 2015 |
| A Hybrid Approach to Standard Cell Power Characterization based on PVT Independent Contributor Modeling for use in Traditional Power Analysis Flows DAC 2015, 2015 | | 2015 |
