A review on power supply induced jitter JN Tripathi, VK Sharma, H Shrimali IEEE Transactions on Components, Packaging and Manufacturing Technology 9 (3 …, 2018 | 54 | 2018 |
Efficient jitter analysis for a chain of CMOS inverters JN Tripathi, P Arora, H Shrimali, R Achar IEEE Transactions on Electromagnetic Compatibility 62 (1), 229-239, 2018 | 28 | 2018 |
CMOS IC radiation hardening by design A Camplani, H Shrimali, A Stabile, V Liberali FACTA UNIVERSITATIS. SERIES ELECTRONICS AND ENERGETICS 27 (2), 251-258, 2014 | 27 | 2014 |
Fluorine-chlorine co-doped TiO2/CSA doped polyaniline based high performance inorganic/organic hybrid heterostructure for UV photodetection applications S Sharma, R Khosla, D Deva, H Shrimali, SK Sharma Sensors and Actuators A: Physical 261, 94-102, 2017 | 25 | 2017 |
11 GHz UGBW Op-amp with feed-forward compensation technique H Shrimali, S Chatterjee 2011 IEEE International Symposium of Circuits and Systems (ISCAS), 17-20, 2011 | 19 | 2011 |
An analysis of power supply induced jitter for a voltage mode driver in high speed serial links JN Tripathi, VK Sharma, H Advani, PN Singh, H Shrimali, R Malik 2016 IEEE 20th Workshop on Signal and Power Integrity (SPI), 1-4, 2016 | 15 | 2016 |
Realization and Performance Analysis of Facile-Processed -IDE-Based Multilayer HfS2/HfO2 Transistors S Sharma, S Das, R Khosla, H Shrimali, SK Sharma IEEE Transactions on Electron Devices 66 (7), 3236-3241, 2019 | 14 | 2019 |
Device parameter-based analytical modeling of power supply induced jitter in CMOS inverters P Arora, JN Tripathi, H Shrimali IEEE Transactions on Electron Devices 68 (7), 3268-3275, 2021 | 13 | 2021 |
An ultra-fast parallel prefix adder KS Pandey, D Kumar, N Goel, H Shrimali 2019 IEEE 26th Symposium on Computer Arithmetic (ARITH), 125-134, 2019 | 13 | 2019 |
Design of a Third Order Butterworth Gm-C Filter for EEG Signal Detection Application A Deo, SK Pandey, A Joshi, SK Sharma, H Shrimali 2018 25th International Conference" Mixed Design of Integrated Circuits and …, 2018 | 13 | 2018 |
Systematic design approach for a gain boosted telescopic OTA with cross‐coupled capacitor A Joshi, H Shrimali, SK Sharma IET Circuits, Devices & Systems 11 (3), 225-231, 2017 | 13 | 2017 |
Distortion analysis of a three-terminal MOS-based discrete-time parametric amplifier H Shrimali, S Chatterjee IEEE Transactions on Circuits and Systems II: Express Briefs 58 (12), 902-905, 2011 | 13 | 2011 |
Design of hybrid flash-SAR ADC using an inverter based comparator in 28 nm CMOS D Kumar, SK Pandey, N Gupta, H Shrimali Microelectronics Journal 95, 104666, 2020 | 12 | 2020 |
High-performance CSA-PANI based organic phototransistor by elastomer gratings S Sharma, R Khosla, S Das, H Shrimali, SK Sharma Organic Electronics 57, 14-20, 2018 | 10 | 2018 |
The start-up circuit for a low voltage bandgap reference H Shrimali, V Liberali 2014 21st IEEE International Conference on Electronics, Circuits and Systems …, 2014 | 10 | 2014 |
Highly UV sensitive Sn nanoparticles blended with polyaniline onto micro-interdigitated electrode array for UV-C detection applications S Sharma, S Das, R Khosla, H Shrimali, SK Sharma Journal of Materials Science: Materials in Electronics 30, 7534-7542, 2019 | 9 | 2019 |
HV-CMOS detectors in BCD8 technology A Andreazza, A Castoldi, V Ceriale, G Chiodini, M Citterio, G Darbo, ... journal of Instrumentation 11 (11), C11038, 2016 | 7 | 2016 |
Tunnel FET negative-differential-resistance based 1T1C refresh-free-DRAM, 2T1C SRAM and 3T1C CAM N Gupta, A Makosiej, H Shrimali, A Amara, A Vladimirescu, C Anghel IEEE Transactions on Nanotechnology 20, 270-277, 2021 | 6 | 2021 |
A 6-bit, 29.56 fJ/Conv-Step, voltage scalable flash-sar hybrid ADC in 28 nm cmos BD Kumar, H Shrimali, N Gupta 2019 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2019 | 6 | 2019 |
Analysing the impact of various deterministic noise sources on jitter in a CMOS inverter MS Illikkal, JN Tripathi, H Shrimali 2019 6th International Conference on Signal Processing and Integrated …, 2019 | 6 | 2019 |