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Hongsoo Jeon
Hongsoo Jeon
삼성전자 Flash 설계1팀
在 samsung.com 的电子邮件经过验证
标题
引用次数
引用次数
年份
A 21 nm high performance 64 Gb MLC NAND flash memory with 400 MB/s asynchronous toggle DDR interface
C Kim, J Ryu, T Lee, H Kim, J Lim, J Jeong, S Seo, H Jeon, B Kim, I Lee, ...
IEEE Journal of Solid-State Circuits 47 (4), 981-989, 2012
802012
7.5 A 128Gb 2b/cell NAND flash memory in 14nm technology with tPROG= 640µs and 800MB/s I/O rate
S Lee, J Lee, I Park, J Park, S Yun, M Kim, J Lee, M Kim, K Lee, T Kim, ...
2016 IEEE International Solid-State Circuits Conference (ISSCC), 138-139, 2016
532016
30.3 A 512Gb 3b/Cell 7th -Generation 3D-NAND Flash Memory with 184MB/s Write Throughput and 2.0Gb/s Interface
J Cho, DC Kang, J Park, SW Nam, JH Song, BK Jung, J Lyu, H Lee, ...
2021 IEEE International Solid-State Circuits Conference (ISSCC) 64, 426-428, 2021
312021
Nonvolatile memory device
CH Kim, BS Lim, PS Kwak, HS Jeon
US Patent 10,446,575, 2019
212019
Non-volatile memory devices and methods of fabricating the same
DK Yun, CH Kim, PS Kwak, HS Jeon
US Patent 10,559,577, 2020
122020
Flash memory device and method of testing a flash memory device
HS Jeon, DH Kim
US Patent 7,710,788, 2010
72010
Memory device, memory system and programming method
HS Jeon, LEE Ji-Sang, OS Kwon
US Patent App. 12/715,692, 2010
62010
Flash memory device and voltage generating circuit for the same
HS Jeon, DH Kim
US Patent 7,486,573, 2009
62009
Voltage generation circuit and flash memory device including the same
HS Jeon
US Patent 7,940,117, 2011
52011
Integrated circuit device
S Nam, Y Kwon, H Jeon
US Patent App. 16/935,607, 2021
42021
Semiconductor memory device having fuse circuits and method of controlling the same
HS Jeon, DH Kim
US Patent 7,738,309, 2010
42010
Trimming circuits including isolated well regions and related memory devices
HS Jeon, SK Lee
US Patent App. 11/240,236, 2006
42006
Memory device including pass transistor circuit
SY Kim, D Byeon, P Kwak, H Jeon
US Patent 11,462,275, 2022
32022
Semiconductor memory device including a capacitor
C Kim, P Kwak, KIM ChaeHoon, H Jeon, J Park, LIM Bongsoon
US Patent 10,546,875, 2020
32020
Three-dimensional semiconductor memory device
LIM Bongsoon, SW Nam, SW Park, SW Shim, H Jeon, Y Choi
US Patent 11,515,325, 2022
22022
Bitline bias circuit and nor flash memory device including the bitline bias circuit
HS Jeon, SK Lee
US Patent 7,656,714, 2010
22010
13.3 A 280-Layer 1Tb 4b/cell 3D-NAND Flash Memory with a 28.5 Gb/mm2 Areal Density and a 3.2 GB/s High-Speed IO Rate
W Jung, H Kim, DB Kim, TH Kim, N Lee, D Shin, M Kim, Y Rho, HJ Lee, ...
2024 IEEE International Solid-State Circuits Conference (ISSCC) 67, 236-237, 2024
12024
Semiconductor device and electronic system including same
CH Yu, H Jeon
US Patent App. 17/704,701, 2023
12023
Memory devices having cell over periphery structure, memory packages including the same, and methods of manufacturing the same
Y Choi, LIM Bongsoon, H Jeon, J Yu
US Patent 11,581,297, 2023
12023
Integrated circuit device and electronic system including same
H Shin, J Park, H Jeon, P Kwak
US Patent App. 17/513,132, 2022
12022
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