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Ivan Saraiva Silva
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引用次数
引用次数
年份
Pipelined fast 2D DCT architecture for JPEG image compression
LV Agostini, IS Silva, S Bampi
Symposium on Integrated Circuits and Systems Design, 226-231, 2001
1402001
Multiplierless and fully pipelined JPEG compression soft IP targeting FPGAs
LV Agostini, IS Silva, S Bampi
Microprocessors and Microsystems 31 (8), 487-497, 2007
392007
Cache coherency communication cost in a NoC-based MPSoC platform
G Girao, BC de Oliveira, R Soares, IS Silva
Proceedings of the 20th annual conference on Integrated circuits and systems …, 2007
342007
High throughput multitransform and multiparallelism IP for H. 264/AVC video compression standard
L Agostini, R Porto, J Guntzel, IS Silva, S Bampi
2006 IEEE International Symposium on Circuits and Systems (ISCAS), 4 pp.-5422, 2006
312006
When reconfigurable architecture meets network-on-chip
R Soares, IS Silva, A Azevedo
Proceedings of the 17th symposium on Integrated circuits and system design …, 2004
312004
A FPGA based design of a multiplierless and fully pipelined JPEG compressor
LV Agostini, RC Porto, S Bampi, IS Silva
8th Euromicro Conference on Digital System Design (DSD'05), 210-213, 2005
182005
Relato de experiência interdisciplinar usando MIPS
SR Fernandes, IS Silva
International Journal of Computer Architecture Education (IJCAE) 6 (1), 52-61, 2017
162017
Parallel color space converters for JPEG image compression
LV Agostini, IS Silva, S Bampi
Microelectronics Reliability 44 (4), 697-703, 2004
162004
Processing while routing: a network-on-chip-based parallel system
SR Fernandes, BC Oliveira, M Costa, IS Silva
IET Computers & Digital Techniques 3 (5), 525-538, 2009
152009
RoSA: a reconfigurable stream-based architecture
MM Pereira, BC de Oliveira, IS Silva
Proceedings of the 20th annual conference on Integrated circuits and systems …, 2007
152007
Pipelined entropy coders for JPEG compression
LV Agostini, IS Silva, S Bampi
Proceedings. 15th Symposium on Integrated Circuits and Systems Design, 203-208, 2002
142002
Using NoC routers as processing elements
S Fernandes, BC Oliveira, IS Silva
Proceedings of the 22nd Annual Symposium on Integrated Circuits and System …, 2009
132009
X4CP32: A coarse grain general purpose reconfigurable microprocessor
R Soares, A Azevedo, IS Silva
Proceedings International Parallel and Distributed Processing Symposium, 8 pp., 2003
132003
Ipnosys ii: A new architecture for ipnosys programming model
TRBS Soares, IS Silva, SR Fernandes
Proceedings of the 28th Symposium on Integrated Circuits and Systems Design, 1-7, 2015
112015
Packet-driven general purpose instruction execution on communication-based architectures
SR Fernandes, IS Silva, M Kreutz
Journal of Integrated Circuits and Systems 5 (1), 53-66, 2010
102010
High throughput architecture of JPEG compressor for color images targeting FPGAs
LV Agostini, S Bampi, IS Silva
2006 13th IEEE International Conference on Electronics, Circuits and Systems …, 2006
102006
High throughput architecture for H. 264/AVC forward transforms block
L Agostini, R Porto, S Bampi, L Rosa, J Güntzel, IS Silva
Proceedings of the 16th ACM Great Lakes symposium on VLSI, 320-323, 2006
102006
Techniques and mechanisms for dynamic reconfiguration in an image processor
MR Boschetti, AMS Adario, IS Silva, S Bampi
Proceedings. 15th Symposium on Integrated Circuits and Systems Design, 177-182, 2002
82002
Systolic Implementation of Smith and Waterman Algorithm on a SIMD Coprocessor
D Archambaud, IS Silva, J Penne
Algorithms and Parallel VLSI Architectures III, 155-166, 1995
81995
Implementação da DCT 2D em arquiteturas reconfiguráveis utilizando a X4CP32
A Azevedo, R Soares, IS Silva
Proceedings of Iberchip 2, 2002
72002
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