| 5-nm gate-all-around transistor technology with 3-D stacked nanosheets AK Gundu, V Kursun IEEE Transactions on Electron Devices 69 (3), 922-929, 2022 | 16 | 2022 |
| A high speed low voltage latch type sense amplifier for non-volatile memory D Arora, AK Gundu, MS Hashmi 2016 20th International Symposium on VLSI Design and Test (VDAT), 1-5, 2016 | 14 | 2016 |
| Low leakage clock tree with dual-threshold-voltage split input–output repeaters AK Gundu, V Kursun IEEE Transactions on Very Large Scale Integration (VLSI) Systems 27 (7 …, 2019 | 11 | 2019 |
| Design of 6T, 5T and 4T SRAM cell on various performance metrics W Singh, GA Kumar 2015 2nd International Conference on Computing for Sustainable Global …, 2015 | 10 | 2015 |
| A new sense amplifier topology with improved performance for high speed sram applications AK Gundu, MS Hashmi, A Grover 2016 29th International Conference on VLSI Design and 2016 15th …, 2016 | 6 | 2016 |
| Energy Efficient Clock Distribution with Low-Leakage Multi-Vt Buffers AK Gundu, V Kursun 2019 29th International Symposium on Power and Timing Modeling, Optimization …, 2019 | 5 | 2019 |
| A proposed low-offset sense amplifier for SRAM applications AK Gundu, W Singh, SM Divi 2015 2nd International Conference on Signal Processing and Integrated …, 2015 | 5 | 2015 |
| Optimization of 3D Stacked Nanosheets in 5nm Gate-all-around Transistor Technology AK Gundu, V Kursun 2021 IEEE 34th International System-on-Chip Conference (SOCC), 25-28, 2021 | 4 | 2021 |
| Statistical analysis and parametric yield estimation of standard 6T SRAM cell for different capacities AK Gundu, MS Hashmi, R Sharma, N Ansari 2015 28th IEEE International System-on-Chip Conference (SOCC), 316-321, 2015 | 4 | 2015 |
| A positive level shifter for high speed symmetric switching in flash memories R Sinha, MS Hashmi, GA Kumar 18th International Symposium on VLSI Design and Test, 1-5, 2014 | 4 | 2014 |
| Modeling and yield estimation of SRAM sub-system for different capacities subjected to parametric variations P Sharma, AK Gundu, MS Hashmi 2016 20th International Symposium on VLSI Design and Test (VDAT), 1-6, 2016 | 2 | 2016 |
| An effective test methodology enabling detection of weak bits in SRAMs: Case study in 28nm FDSOI N Batra, AK Gundu, MS Hashmi, GS Visweswaran, A Grover 2016 20th International Symposium on VLSI Design and Test (VDAT), 1-6, 2016 | 2 | 2016 |
| Novel low leakage and energy efficient dual-pullup/dual-pulldown repeater AK Gundu, V Kursun Integration 78, 110-117, 2021 | 1 | 2021 |
| A regression based methodology to estimate SNM for improving yield of 6T SRAM AK Gundu, MS Hashmi, R Sharma 2016 IEEE 59th International Midwest Symposium on Circuits and Systems …, 2016 | 1 | 2016 |
| A method to estimate effectiveness of weak bit test: Comparison of weak pMOS and WL boost based test-28nm FDSOI implementation N Batra, S Kaushik, AK Gundu, MS Hashmi, GS Visweswaran, A Grover 2016 29th IEEE International System-on-Chip Conference (SOCC), 47-51, 2016 | 1 | 2016 |
| Impact of Sheet Width and Silicon Height in 3D Stacked Nanosheet GAA Transistor Technology AK Gundu, V Kursun 2022 IEEE International Symposium on Circuits and Systems (ISCAS), 2547-2550, 2022 | | 2022 |
| Static Random-Access Memory Circuits with 3D Stacked Nanosheet Devices AK Gundu PQDT-Global, 2022 | | 2022 |
| Identification of weak bits in SRAM GA Kumar, MS Hashmi | | 2015 |
| Track-wise list of papers S Khandelwal, J Meena, L Garg, D Boolchandani, P Sharma, AK Gundu, ... | | |
Mohammad HashmiNazarbayev University, Astana, Kazakhstan在 nu.edu.kz 的电子邮件经过验证
