| Weighted round-robin cell multiplexing in a general-purpose ATM switch chip M Katevenis, S Sidiropoulos, C Courcoubetis IEEE Journal on selected Areas in Communications 9 (8), 1265-1279, 1991 | 812 | 1991 |
| Reduced instruction set computer architectures for vlsi (microprocessor, risc, multiple-windows-of-registers) EMG Katevenis University of California, Berkeley, 1983 | 359 | 1983 |
| Fast switching and fair control of congested flow in broadband networks M Katevenis IEEE Journal on selected Areas in Communications 5 (8), 1315-1326, 1987 | 163 | 1987 |
| Variable packet size buffered crossbar (CICQ) switches M Katevenis, G Passas, D Simos, I Papaefstathiou, N Chrysos 2004 IEEE International Conference on Communications (IEEE Cat. No …, 2004 | 118 | 2004 |
| Pipelined heap (priority queue) management for advanced scheduling in high-speed networks A Ioannou, MGH Katevenis IEEE/ACM Transactions on Networking 15 (2), 450-461, 2007 | 102 | 2007 |
| Pipelined memory shared buffer for VLSI switches M Katevenis, P Vatsolaki, A Efthymiou Proceedings of the conference on Applications, technologies, architectures …, 1995 | 97 | 1995 |
| Approaching ideal NoC latency with pre-configured routes G Michelogiannakis, D Pnevmatikatos, M Katevenis First International Symposium on Networks-on-Chip (NOCS'07), 153-162, 2007 | 76 | 2007 |
| Euroserver: Energy efficient node for european micro-servers Y Durand, PM Carpenter, S Adami, A Bilas, D Dutoit, A Farcy, ... 2014 17th Euromicro Conference on Digital System Design, 206-213, 2014 | 72 | 2014 |
| Scheduling in Non-Blocking Buffered Three-Stage Switching Fabrics. N Chrysos, M Katevenis INFOCOM 6, 1-13, 2006 | 70 | 2006 |
| The HiPEAC vision: high performance and embedded architecture and compilation M Duranton, S Yehia, B De Sutter, K De Bosschere, A Cohen, B Falsafi, ... | 69* | 2019 |
| Crossbar NoCs are scalable beyond 100 nodes G Passas, M Katevenis, D Pnevmatikatos IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2012 | 69 | 2012 |
| The exanest project: Interconnects, storage, and packaging for exascale systems M Katevenis, N Chrysos, M Marazakis, I Mavroidis, F Chaix, N Kallimanis, ... 2016 Euromicro Conference on Digital System Design (DSD), 60-67, 2016 | 64 | 2016 |
| Weighted fairness in buffered crossbar scheduling N Chrysos, M Katevenis Workshop on High Performance Switching and Routing, 2003, HPSR., 17-22, 2003 | 64 | 2003 |
| The hipeac vision M Duranton, S Yehia, B De Sutter, K De Bosschere, A Cohen, B Falsafi, ... Report, European Network of Excellence on High Performance and Embedded …, 2010 | 63 | 2010 |
| SECONDARYSTORAGEMANAG EMENT FORWEBPROXIES EP Markatos, MGH Katevenis, D Pnevmatikatos, M Flouris Proceedings of the 2nd USENIX Symposium on Internet Technologies and Systems …, 1999 | 55 | 1999 |
| Efficient per-flow queueing in DRAM at OC-192 line rate using out-of-order execution techniques A Nikologiannis, M Katevenis ICC 2001. IEEE International Conference on Communications. Conference Record …, 2001 | 54 | 2001 |
| User-level DMA without operating system kernel modification EP Markatos, MGH Katevenis Proceedings Third International Symposium on High-Performance Computer …, 1997 | 54 | 1997 |
| ATLAS I: A general-purpose, single-chip ATM switch with credit-based flow control M Katevenis, D Serpanos, P Vatsolaki Proceedings of the Hot Interconnects IV Symposium, 63-73, 1996 | 53 | 1996 |
| Prefetching and cache management using task lifetimes V Papaefstathiou, MGH Katevenis, DS Nikolopoulos, D Pnevmatikatos Proceedings of the 27th international ACM conference on International …, 2013 | 51 | 2013 |
| A 128 x 128 x 24gb/s crossbar interconnecting 128 tiles in a single hop and occupying 6% of their area G Passas, M Katevenis, D Pnevmatikatos 2010 Fourth ACM/IEEE International Symposium on Networks-on-Chip, 87-95, 2010 | 50 | 2010 |
Nikolaos ChrysosFoundation For Research & Technology (FORTH) -- Hellas在 ics.forth.gr 的电子邮件经过验证
