At-speed ATPG testing and apparatus for SoC designs having multiple clock domain using a VLCT test platform AA Agashe, N Krishnamoorthy, S Anindya, RA Parekhji US Patent 7,134,061, 2006 | 93 | 2006 |
Method and system of registering a user device with a dynami-cally self-optimizing communication network V Kayargadde, P Naik, S Anindya, SH Ramesh US Patent 9,467,337, 2016 | 27 | 2016 |
Software defined radio for modulation and demodulation of multiple communication standards P Naik, S Anindya, H Mallapur, HR Sunil, G Padaki US Patent 8,571,119, 2013 | 26 | 2013 |
Evaluation of ATSC 3.0 and 3GPP Rel-17 5G broadcasting systems for mobile handheld applications SK Ahn, S Ahn, J Kim, H Kim, S Kwon, S Jeon, M Ek, S Simha, A Saha, ... IEEE Transactions on Broadcasting 69 (2), 338-356, 2022 | 21 | 2022 |
Zero overhead block floating point implementation in CPU's G Padaki, S Anindya, P Naik, V Kayargadde, HR Sunil US Patent 8,788,549, 2014 | 20 | 2014 |
System and method for offloading data and video traffic to a supplemental downlink overlay network P Naik, A Chakraborty, S Anindya, V Kayargadde US Patent 10,904,791, 2021 | 19 | 2021 |
Providing optimal supply voltage to integrated circuits S Anindya, VG Pawar, S Prasad, A Sharma, SR Puthucode US Patent 7,423,475, 2008 | 10 | 2008 |
A Survey on Multicast Broadcast Services in 5G and Beyond R Kamran, P Jha, S Kiran, A Karandikar, P Chaporkar, A Saha, ... 2022 National Conference on Communications (NCC), 344-349, 2022 | 9 | 2022 |
SoC design methodology: a practical approach A Jain, A Saha, J Rao 18th International Conference on VLSI Design held jointly with 4th …, 2005 | 8 | 2005 |
Mechanism for efficient implementation of software pipelined loops in VLIW processors S Anindya, M Kumar, H Mallapur, S Billava, V Rajangam US Patent 8,447,961, 2013 | 7 | 2013 |
Scalable VLIW processor for high-speed viterbi and trellis coded modulation decoding S Anindya, H Mallapur, S Billava, SBM Veerabhadresh US Patent 8,255,780, 2012 | 6 | 2012 |
Radio mapping architecture for applying machine learning techniques to wireless radio access networks A Chakraborty, P Naik, S Anindya, V Kayargadde, SK Datta US Patent 12,052,583, 2024 | 5 | 2024 |
System and method for mitigating co-channel interference in white space modems using interference aware techniques SM Anand, SS Bhat, S Anindya US Patent 9,949,277, 2018 | 5 | 2018 |
IEEE 802.22/802.22. 3 cognitive radio standards: Theory to implementation A Mody, A Saha, I Reede, G Miele, G Cerro Handbook of Cognitive Radio 3, 1743-1794, 2019 | 4 | 2019 |
Method and system of dynamically designing and operating an optimal communication network configuration V Kayargadde, P Naik, S Anindya, SH Ramesh US Patent 9,762,441, 2017 | 4 | 2017 |
A DSL customer-premise equipment modem SoC with extended reach/rate for broadband bridging and routing A Saha, S Oswal, S Prasad, J Kennedy, S Kumar, B Datta, A Sharma, ... 2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No …, 2004 | 4 | 2004 |
Performance Evaluation of 5G MBS for Terrestrial Broadcasting Scenarios SK Ahn, S Ahn, S Simha, M Aitken, A Saha, P Maru, P Naik, SI Park 2023 IEEE International Symposium on Broadband Multimedia Systems and …, 2023 | 3 | 2023 |
System and method for mitigating co-channel interference in white space modems SM Anand, SS Bhat, S Anindya US Patent 10,014,904, 2018 | 3 | 2018 |
Using formal techniques for identifying uninitialized registers in SoC designs A Saha, RS Ranmale 15th Annual IEEE International ASIC/SOC Conference, 59-62, 2002 | 3 | 2002 |
Optimizing ran compute resources in a vertically scaled vran deployment S Anindya, PB Naik, S Pendharkar, V Kolathur, V Shreesha US Patent App. 17/694,026, 2022 | 2 | 2022 |