Multipartite table methods F De Dinechin, A Tisserand IEEE Transactions on Computers 54 (3), 319-330, 2005 | 237 | 2005 |
Reciprocation, square root, inverse square root, and some elementary functions using small multipliers MD Ercegovac, T Lang, JM Muller, A Tisserand IEEE Transactions on computers 49 (7), 628-637, 2000 | 188 | 2000 |
Power consumption of GPUs from a software perspective S Collange, D Defour, A Tisserand Computational Science–ICCS 2009: 9th International Conference Baton Rouge …, 2009 | 175 | 2009 |
Toward correctly rounded transcendentals V Lefèvre, JM Muller, A Tisserand IEEE Transactions on Computers 47 (11), 1235-1243, 1998 | 132 | 1998 |
Some optimizations of hardware multiplication by constant matrices N Boullis, A Tisserand IEEE Transactions on Computers 54 (10), 1271-1282, 2005 | 122 | 2005 |
Some improvements on multipartite table methods F de Dinechin, A Tisserand Proceedings 15th IEEE Symposium on Computer Arithmetic. ARITH-15 2001, 128-135, 2001 | 100 | 2001 |
An on-line arithmetic based FPGA for low-power custom computing A Tisserand, P Marchal, C Piguet Field Programmable Logic and Applications: 9th International Workshop, FPL …, 1999 | 88 | 1999 |
Computing machine-efficient polynomial approximations N Brisebarre, JM Muller, A Tisserand ACM Transactions on Mathematical Software (TOMS) 32 (2), 236-256, 2006 | 77 | 2006 |
Multi-mode operator for SHA-2 hash functions R Glabb, L Imbert, G Jullien, A Tisserand, N Veyrat-Charvillon Journal of Systems Architecture 53 (2-3), 127-138, 2007 | 71 | 2007 |
Single base modular multiplication for efficient hardware RNS implementations of ECC K Bigou, A Tisserand Cryptographic Hardware and Embedded Systems--CHES 2015: 17th International …, 2015 | 46 | 2015 |
Hardware/software co-design of an accelerator for FV homomorphic encryption scheme using Karatsuba algorithm V Migliore, MM Real, V Lapotre, A Tisserand, C Fontaine, G Gogniat IEEE Transactions on Computers 67 (3), 335-347, 2016 | 45 | 2016 |
Comparison of modular arithmetic algorithms on GPUs P Giorgi, T Izard, A Tisserand Parallel Computing: From Multicores and GPU's to Petascale, 315-322, 2010 | 44 | 2010 |
SPA resistant elliptic curve cryptosystem using addition chains A Byrne, F Crowe, WP Marnane, N Meloni, A Tisserand, E Popovici International Journal of High Performance Systems Architecture 1 (2), 133-142, 2007 | 37 | 2007 |
Semi-logarithmic number systems JM Muller, A Scherbyna, A Tisserand IEEE transactions on computers 47 (2), 145-151, 1998 | 35 | 1998 |
Carry prediction and selection for truncated multiplication R Michard, A Tisserand, N Veyrat-Charvillon 2006 IEEE Workshop on Signal Processing Systems Design and Implementation …, 2006 | 31 | 2006 |
Improving modular inversion in RNS using the plus-minus method K Bigou, A Tisserand Cryptographic Hardware and Embedded Systems-CHES 2013: 15th International …, 2013 | 29 | 2013 |
FPGA implementation of a recently published signature scheme JL Beuchat, N Sendrier, A Tisserand, G Villard INRIA, LIP, 2004 | 29 | 2004 |
A high-speed accelerator for homomorphic encryption using the karatsuba algorithm V Migliore, C Seguin, MM Real, V Lapotre, A Tisserand, C Fontaine, ... ACM Transactions on Embedded Computing Systems (TECS) 16 (5s), 1-17, 2017 | 28 | 2017 |
Small multiplier-based multiplication and division operators for Virtex-II devices JL Beuchat, A Tisserand Field-Programmable Logic and Applications: Reconfigurable Computing Is Going …, 2002 | 28 | 2002 |
High-performance hardware operators for polynomial evaluation A Tisserand International Journal of High Performance Systems Architecture 1 (1), 14-23, 2007 | 27 | 2007 |