| Demystifying automotive safety and security for semiconductor developer V Prasanth, D Foley, S Ravi 2017 IEEE International Test Conference (ITC), 1-10, 2017 | 11 | 2017 |
| Reduced overhead soft error mitigation using error control coding techniques V Prasanth, V Singh, R Parekhji On-Line Testing Symposium (IOLTS), 2011 IEEE 17th International, 163-168, 2011 | 10 | 2011 |
| Robust detection of soft errors using delayed capture methodology V Prasanth, V Singh, R Parekhji 2010 IEEE 16th International On-Line Testing Symposium, 277-282, 2010 | 9 | 2010 |
| Background memory test apparatus and methods PV Pillai, SG Langadi US Patent 10,062,451, 2018 | 8 | 2018 |
| Continuous control set model predictive control of buck converter PV Harisyam, V Prasanth, V Natarajan, K Basu IECON 2020 The 46th Annual Conference of the IEEE Industrial Electronics …, 2020 | 7 | 2020 |
| Transcendental function evaluation PV Pillai, RM Poley, V Natarajan, A Tessarolo US Patent 10,725,742, 2020 | 5 | 2020 |
| Apparatus having signal chain lock step for high integrity functional safety applications JE Stafford, PV Pillai, AA Vanjari US Patent 10,620,260, 2020 | 5 | 2020 |
| DFT Implementationis for Striking the Right Balance between Test Cost and Test Quality for Automotive SOCs A Dutta, S Alampally, V Prasanth, RA Parekhji Test Conference, 2008. ITC 2008. IEEE International, 1-10, 2008 | 5 | 2008 |
| Improved methods for accurate safety analysis of real-life systems V Prasanth, R Parekhji, B Amrutur 2015 IEEE 24th Asian Test Symposium (ATS), 175-180, 2015 | 4 | 2015 |
| Maximizing Re-Use of External Pins of an Integrated Circuit for Testing RK Chandel, P ViswanathanPillai US Patent App. 13/363,604, 2013 | 4 | 2013 |
| Derating based hardware optimizations in soft error tolerant designs V Prasanth, V Singh, R Parekhji VLSI Test Symposium (VTS), 2012 IEEE 30th, 282-287, 2012 | 4 | 2012 |
| Lockstep comparators and related methods PV Pillai, R Suvarna, SG Langadi, SG Ghotgalkar US Patent 11,474,151, 2022 | 3 | 2022 |
| High performance and EV power train system using C2000 MCU for functional safety S Ghotgalkar, A Vanjari, H Zhang, PV Pillai, M Mody, K Rajamanickam, ... 2022 IEEE International Conference on Electronics, Computing and …, 2022 | 3 | 2022 |
| Safety analysis for integrated circuits in the context of hybrid systems V Prasanth, R Parekhji, B Amrutur 2017 IEEE International Test Conference (ITC), 1-10, 2017 | 3 | 2017 |
| Interruptible trigonometric operations PV Pillai, V Natarajan, A Tessarolo US Patent 10,168,992, 2019 | 2 | 2019 |
| Exploiting Application Tolerance for Functional Safety V Prasanth, R Parekhji, B Amrutur 2021 IEEE International Test Conference (ITC), 399-408, 2021 | 1 | 2021 |
| Transcendental function evaluation PV Pillai, RM Poley, V Natarajan, A Tessarolo US Patent 11,099,815, 2021 | 1 | 2021 |
| Architecture and instruction set to support integer division A Tessarolo, PV Pillai, V Natarajan US Patent 10,628,126, 2020 | 1 | 2020 |
| Architecture and instruction set to support integer division A Tessarolo, PV Pillai, V Natarajan US Patent 10,359,995, 2019 | 1 | 2019 |
| Perturbation based workload augmentation for comprehensive functional safety analysis V Prasanth, R Parekhji, B Amrutur 2019 32nd International Conference on VLSI Design and 2019 18th …, 2019 | 1 | 2019 |
Virendra SinghAssociate Professor of Electrical Engineering, Indian Institute of Technology Bombay在 ee.iitb.ac.in 的电子邮件经过验证
