| Manticore: Hardware-accelerated RTL simulation with static bulk-synchronous parallelism M Emami, S Kashani, K Kamahori, MS Pourghannad, R Raj, JR Larus Proceedings of the 28th ACM International Conference on Architectural …, 2023 | 15 | 2023 |
| A 65nm compute-in-memory 7T SRAM macro supporting 4-bit multiply and accumulate operation by employing charge sharing D Kushwaha, A Sharma, N Gupta, R Raj, A Joshi, J Mishra, R Kohli, ... 2022 IEEE International Symposium on Circuits and Systems (ISCAS), 1556-1560, 2022 | 9 | 2022 |
| Demystifying Platform Requirements for Diverse LLM Inference Use Cases A Bambhaniya, R Raj, G Jeong, S Kundu, S Srinivasan, M Elavazhagan, ... arXiv preprint arXiv:2406.01698, 2024 | 3 | 2024 |
| Towards cognitive ai systems: Workload and characterization of neuro-symbolic ai Z Wan, CK Liu, H Yang, R Raj, C Li, H You, Y Fu, C Wan, A Samajdar, ... 2024 IEEE International Symposium on Performance Analysis of Systems and …, 2024 | 2 | 2024 |
| Towards Efficient Neuro-Symbolic AI: From Workload Characterization to Hardware Architecture Z Wan, CK Liu, H Yang, R Raj, C Li, H You, Y Fu, C Wan, S Li, Y Kim, ... IEEE Transactions on Circuits and Systems for Artificial Intelligence, 2024 | 1 | 2024 |
| A 475 MHz Manycore FPGA Accelerator for RTL Simulation S Kashani, M Emami, K Kamahori, S Pourghannad, R Raj, JR Larus Proceedings of the 2024 ACM/SIGDA International Symposium on Field …, 2024 | 1 | 2024 |
