Electrodeposition of Large Area, Angle-Insensitive Multilayered Structural Colors C Ji#, S Acharya#, K Yamada, S Maldonado, LJ Guo ACS Applied Materials & Interfaces, 2019 | 30 | 2019 |
Reduction of Graphene Oxide Thin Films by Cobaltocene and Decamethylcobaltocene MM MacInnes, S Hlynchuk, S Acharya, N Lehnert, S Maldonado ACS Applied Materials & Interfaces 10 (2), 2004-2015, 2017 | 28 | 2017 |
Critical Factors in the Growth of Hyperdoped Germanium Microwires by Electrochemical Liquid–Liquid–Solid Method S Acharya, L Ma, S Maldonado ACS Applied Nano Materials 1 (10), 5553-5561, 2018 | 18 | 2018 |
Eutectic-bismuth indium as a growth solvent for the electrochemical liquid-liquid-solid deposition of germanium microwires and coiled nanowires J DeMuth, L Ma, M Lancaster, S Acharya, Q Cheek, S Maldonado Crystal Growth & Design 18 (2), 677-685, 2018 | 14 | 2018 |
Semiconductor ultramicroelectrodes: platforms for studying charge-transfer processes at semiconductor/liquid interfaces S Acharya, M Lancaster, S Maldonado Analytical chemistry 90 (20), 12261-12269, 2018 | 12 | 2018 |
Performance evaluation of an integer wavelet transform for FPGA implementation S Acharya, H Kabra, PV Kasambe, SS Rathod 2015 International Conference on Nascent Technologies in the Engineering …, 2015 | 5 | 2015 |
The CMS pixel detector for the High Luminosity LHC A Cassese, CMS collaboration Journal of Instrumentation 18 (01), C01031, 2023 | 1 | 2023 |
INTEGRATED CIRCUIT STRUCTURE WITH DEEP VIA BAR ISOLATION LP Guler, CD Munasinghe, CH Wallace, S Liu, S Acharya US Patent App. 18/212,382, 2024 | | 2024 |
Backside conductive structures extending through integrated circuit to meet frontside contacts LP Guler, CJ Engel, D Nandi, G Allen, NA Thomson, S Acharya, U Desai, ... US Patent App. 18/137,731, 2024 | | 2024 |
Conductive bridge through dielectric wall between source or drain contacts LP Guler, LIU Shengsi, S Acharya, ZHU Baofu, M Ramanathan, ... US Patent App. 18/753,781, 2024 | | 2024 |
Conductive bridge through dielectric wall between source or drain contacts LP Guler, LIU Shengsi, S Acharya, ZHU Baofu, M Ramanathan, ... US Patent App. 18/136,991, 2024 | | 2024 |
Bridging contact structures LP Guler, PK Luthra, N Khandelwal, MT Conte, S Acharya, LIU Shengsi, ... US Patent App. 18/125,455, 2024 | | 2024 |
Contact extended over an adjacent source or drain region LP Guler, LIU Shengsi, ZHU Baofu, CH Wallace, CJ Engel, G Allen, ... US Patent App. 18/125,456, 2024 | | 2024 |
Isolated backside contacts for semiconductor devices LP Guler, CH Wallace, LIU Shengsi, S Acharya US Patent App. 18/125,440, 2024 | | 2024 |
Semiconductor devices between gate cuts and deep backside vias LP Guler, LIU Shengsi, S Acharya, ZHU Baofu, CH Wallace US Patent App. 18/125,430, 2024 | | 2024 |
Gate link across gate cut in semiconductor devices LP Guler, LIU Shengsi, S Acharya, T Obrien, K Ganesan, AK Lakhani, ... US Patent App. 18/125,447, 2024 | | 2024 |
Integrated circuit structures with uniform epitaxial source or drain cut LP Guler, M Hasan, A Navabi-Shirazi, J Panella, S Acharya, ... US Patent App. 17/955,513, 2024 | | 2024 |
Integrated circuit structures having gate cut plugremoved from trench contact LP Guler, M Conte, CH Wallace, R Joachim, LIU Shengsi, S Acharya, ... US Patent App. 17/953,085, 2024 | | 2024 |
Integrated circuit structures with trench contact depopulation structure LP Guler, DS Lavric, CH Wallace, T Ghani, S Acharya, T O'brien US Patent App. 17/953,096, 2024 | | 2024 |
Integrated circuit structures having uniform grid metal gate and trench contact plug LP Guler, S Yemenicioglu, MK Haran, SM Cea, CH Wallace, T Ghani, ... US Patent App. 17/954,206, 2024 | | 2024 |