| Dual-material dual-oxide double-gate TFET for improvement in DC characteristics, analog/RF and linearity performance S Kumar, KS Singh, K Nigam, VA Tikkiwal, BV Chandan Applied Physics A 125 (5), 353, 2019 | 87 | 2019 |
| Impact of interface trap charges on analog/RF and linearity performances of dual-material gate-oxide-stack double-gate TFET KS Singh, S Kumar, K Nigam IEEE Transactions on Device and Materials Reliability 20 (2), 404-412, 2020 | 60 | 2020 |
| Impact of a metal-strip on a polarity-based electrically doped TFET for improvement of DC and analog/RF performance BV Chandan, M Gautami, K Nigam, D Sharma, VA Tikkiwal, S Yadav, ... Journal of Computational Electronics 18 (1), 76-82, 2018 | 27 | 2018 |
| Design and investigation of dielectrically modulated dual-material gate-oxide-stack double-gate TFET for label-free detection of biomolecules KS Singh, S Kumar, K Nigam IEEE Transactions on Electron Devices 68 (11), 5784-5791, 2021 | 25 | 2021 |
| Performance improvement of double-gate TFET using metal strip technique S Kumar, K Nigam, S Chaturvedi, AI Khan, A Jain Silicon, 1-8, 2021 | 19 | 2021 |
| Tunnel Field Effect Transistor for Ultra Low Power Applications: A Review KS Singh, S Kumar, K Nigam, VA Tikkiwal 2019 International Conference on Signal Processing and Communication (ICSC …, 2019 | 16 | 2019 |
| Temperature dependence of analogue/RF performance, linearity and harmonic distortion for dual‐material gate‐oxide‐stack double‐gate TFET S Kumar IET Circuits, Devices & Systems 15 (6), 540-552, 2021 | 12 | 2021 |
| Ambipolarity suppressed dual-material double-source T-shaped tunnel field-effect transistor S Kumar, KS Singh, K Nigam, S Chaturvedi Silicon 13, 2065-2070, 2021 | 12 | 2021 |
| Temperature sensitivity analysis of dual material stack gate oxide source dielectric pocket TFET K Nigam, S Kumar, Dharmender Journal of Computational Electronics 21 (4), 802-813, 2022 | 11 | 2022 |
| Design and analysis of distributed arithmetic based FIR filter S Akhter, S Kumar, D Bareja 2018 International Conference on Advances in Computing, Communication …, 2018 | 11 | 2018 |
| Temperature sensitivity analysis of SGO metal strip JL TFET K Nigam, S Kumar, KS Singh, E Bhardwaj, S Choubey, S Chaturvedi IET Circuits, Devices & Systems 14 (4), 444-449, 2020 | 10 | 2020 |
| Read SNM free SRAM cell design in deep submicron technology S Kumar, VA Tikkiwal, H Gupta 2013 INTERNATIONAL CONFERENCE ON SIGNAL PROCESSING AND COMMUNICATION (ICSC …, 2013 | 9 | 2013 |
| III-V/Si Heterojunction based Dual Material Stack Gate Oxide TFETs for Low Power Applications K Nigam, S Kumar 2021 7th International Conference on Signal Processing and Communication …, 2021 | 8 | 2021 |
| Vertical tunneling based dual-material double-gate TFET KS Singh, S Kumar, K Nigam 2021 International Conference on Computing, Communication, and Intelligent …, 2021 | 7 | 2021 |
| Run time write detection in SRAM S Kumar, K Saha, H Gupta 2015 International Conference on Signal Processing and Communication (ICSC …, 2015 | 7 | 2015 |
| Performance assessment of cavity on source dual material split gate GaAs/InAs/Ge junctionless TFET for label-free detection of biomolecules Dharmender, K Nigam, S Kumar Applied Physics A 128 (10), 943, 2022 | 6 | 2022 |
| Performance and analysis of stack junctionless tunnel field effect transistor K Nigam, PN Kondekar, BV Chandan, S Kumar, VA Tikkiwal, Dharmender, ... Silicon, 1-10, 2021 | 6 | 2021 |
| Impact of gate overlap and underlap on analog/RF and linearity performance of dual-material gate-oxide-stack double-gate TFET P Verma, K Nigam, S Kumar Applied Physics A 128 (11), 955, 2022 | 5 | 2022 |
| SRAM write assist techniques for low power applications S Kumar, P Saxena, VA Tikkiwal 2016 International Conference on Signal Processing and Communication (ICSC …, 2016 | 5 | 2016 |
| Performance Analysis of Stack Gate Oxide Underlap TFET Utilising Metal Strip Mechanism P Verma, S Kumar, K Nigam 2021 7th International Conference on Signal Processing and Communication …, 2021 | 3 | 2021 |
