| Design of a stable low power 11-T static random access memory cell A Sachdeva, VK Tomar Journal of circuits, Systems and Computers 29 (13), 2050206, 2020 | 42 | 2020 |
| A carbon nano-tube field effect transistor based stable, low-power 8T static random access memory cell with improved write access time A Sachdeva, D Kumar, E Abbasian AEU-International Journal of Electronics and Communications 162, 154565, 2023 | 39 | 2023 |
| Design of multi-cell upset immune single-end SRAM for low power applications A Sachdeva, VK Tomar AEU-International Journal of Electronics and Communications 128, 153516, 2020 | 29 | 2020 |
| Design of Low Power Half Select Free 10T Static Random-Access Memory Cell A Sachdeva, VK Tomar Journal of Circuits, Systems and Computers 30 (04), 2150073, 2021 | 28 | 2021 |
| Design of 10T SRAM cell with improved read performance and expanded write margin A Sachdeva, VK Tomar IET Circuits, Devices & Systems, 2020 | 28 | 2020 |
| A Schmitt-trigger based low read power 12T SRAM cell A Sachdeva, VK Tomar Analog integrated circuits and signal processing 105 (2), 275-295, 2020 | 25 | 2020 |
| Characterization of stable 12T SRAM with improved critical charge A Sachdeva, VK Tomar Journal of circuits, Systems and computers 31 (02), 2250023, 2022 | 18 | 2022 |
| Highly-efficient cntfet-based unbalanced ternary logic gates E Abbasian, S Sofimowloodi, A Sachdeva ECS Journal of Solid State Science and Technology 12 (3), 031007, 2023 | 15 | 2023 |
| Design of a soft error hardened SRAM cell with improved access time for embedded systems VK Tomar, A Sachdeva Microprocessors and Microsystems 90, 104445, 2022 | 15 | 2022 |
| A soft-error resilient low power static random access memory cell A Sachdeva, VK Tomar Analog Integrated Circuits and Signal Processing 109 (1), 187-211, 2021 | 15 | 2021 |
| Statistical stability characterization of schmitt trigger based 10-t sram cell design A Sachdeva, VK Tomar 2020 7th international conference on signal processing and integrated …, 2020 | 15 | 2020 |
| Implementation and analysis of power reduction techniques in charge transfer sense amplifier for sub 90nm SRAM VK Tomar, A Sachdeva 2017 8th International Conference on Computing, Communication and Networking …, 2017 | 15 | 2017 |
| A multi-bit error upset immune 12T SRAM cell for 5G satellite communications A Sachdeva, VK Tomar Wireless Personal Communications 120 (3), 2201-2225, 2021 | 14 | 2021 |
| Investigations of various sram cell structures for leakage energy reduction A Sachdeva, VK Tomar 2016 2nd international conference on communication control and intelligent …, 2016 | 12 | 2016 |
| Design of a stable single sided 11T static random access memory cell with improved critical charge A Sachdeva International Journal of Numerical Modelling: Electronic Networks, Devices …, 2022 | 11 | 2022 |
| Stability and dynamic power analysis of novel 9t sram cell for iot applications A Sachdeva, VK Tomar Communication and Intelligent Systems: Proceedings of ICCIS 2020, 945-953, 2021 | 11 | 2021 |
| A CNTFET Based Bit-Line Powered Stable SRAM Design for Low Power Applications A Sachdeva, K Sharma, L Gupta, M Elangovan ECS Journal of Solid State Science and Technology, 2023 | 10 | 2023 |
| Low‐power FinFET based boost converter design using dynamic threshold body biasing technique K Sharma, S Thakur, M Elangovan, A Sachdeva International Journal of Numerical Modelling: Electronic Networks, Devices …, 2023 | 8 | 2023 |
| CNTFET-based design of low power charge pump technique-based voltage multiplier R Rajora, K Sharma, L Gupta, A Sachdeva 2023 IEEE Devices for Integrated Circuit (DevIC), 442-445, 2023 | 5 | 2023 |
| Design and Simulation of Cascode Current reuse low power Operational transconductance amplifier RR Kumar, K Sharma, A Sachdeva, L Gupta 2023 IEEE Devices for Integrated Circuit (DevIC), 34-37, 2023 | 5 | 2023 |
Prof. (Dr.) V. K. TomarCoordinator, B. Tech. ECE (VLSI),Department of Electronics & Communication Engineering, GLA在 gla.ac.in 的电子邮件经过验证
