| Metodologias de Avaliação do Pensamento Computacional: uma revisão sistemática C Avila, S Cavalheiro, A Bordini, M Marques, M Cardoso, G Feijó Brazilian Symposium on Computers in Education (Simpósio Brasileiro de …, 2017 | 34 | 2017 |
| Libra: An automatic design methodology for CMOS complex gates MS Cardoso, GH Smaniotto, AAO Bubolz, MT Moreira, LS da Rosa, ... IEEE Transactions on Circuits and Systems II: Express Briefs 65 (10), 1345-1349, 2018 | 9 | 2018 |
| Transistor placement for automatic cell synthesis through boolean satisfiability M Cardoso, A Bubolz, J Cortadella, L Rosa, F Marques 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2020 | 6 | 2020 |
| Topological characteristics of logic networks generated by a graph-based methodology MS Cardoso, R Zanandrea, RS de Souza, JJ da Silva Machado, ... 2016 IEEE 7th Latin American Symposium on Circuits & Systems (LASCAS), 343-346, 2016 | 5 | 2016 |
| Evaluating geometric aspects of non-series-parallel cells MS Cardoso, LS da Rosa Jr, F de Souza Marques Proceedings of the 28th Symposium on Integrated Circuits and Systems Design, 1-6, 2015 | 5 | 2015 |
| A post-processing methodology to improve the automatic design of cmos gates at layout-level G Smaniotto, R Zanandrea, M Cardoso, R de Souza, M Moreira, ... 2017 24th IEEE International Conference on Electronics, Circuits and Systems …, 2017 | 3 | 2017 |
| Physical design of supergate cells aiming geometrical optimizations MS Cardoso, GH Smaniotto, R Zanandrea, RS de Souza, LS da Rosa, ... 2016 IEEE 59th International Midwest Symposium on Circuits and Systems …, 2016 | 3 | 2016 |
| Area-Aware Design of Static CMOS Complex Gates MS Cardoso, GH Smaniotto, AAO Bubolz, LS da Rosa Junior, ... 2018 16th IEEE International New Circuits and Systems Conference (NEWCAS …, 2018 | 2 | 2018 |
| Transistor placement strategies for non-series-parallel cells MS Cardoso, GH Smaniotto, JJS Machado, MT Moreira, LS da Rosa, ... 2017 IEEE 60th International Midwest Symposium on Circuits and Systems …, 2017 | 2 | 2017 |
| Post-processing of supergate networks aiming cell layout optimization G Smaniotto, R Zanandrea, M Cardoso, R de Souza, M Moreira, ... 2017 IEEE International Symposium on Circuits and Systems (ISCAS), 1-4, 2017 | 2 | 2017 |
| Cell implementation through boolean satisfiability for conventional and emerging technologies MS Cardoso Universidade Federal de Pelotas, 2022 | | 2022 |
| Projeto e avaliação de portas lógicas complexas sem restrições topológicas MS Cardoso Universidade Federal de Pelotas, 2017 | | 2017 |
| Implementation of a Transistor Placement Method Based on Boolean Satisfiability into ASTRAN CAD Tool AAO Bubolz, GH Smaniotto, LS da Rosa Jr, MS Cardoso, FS Marques | | |
| Aplicação de Satisfatibilidade Booleana para Geração Automática de Bibliotecas Standard Cell MS Cardoso, LS da Rosa Jr, FS Marques | | |
| Topological Aspects of Non-Series-Parallel Transistors Networks MS Cardoso, R Zanandrea, RS de Souza, LS da Rosa Jr, ... | | |
